forked from grate-driver/linux
-
Notifications
You must be signed in to change notification settings - Fork 0
/
es1938.c
1843 lines (1614 loc) · 53.8 KB
/
es1938.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
* Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
* Jaroslav Kysela <perex@perex.cz>,
* Thomas Sailer <sailer@ife.ee.ethz.ch>,
* Abramo Bagnara <abramo@alsa-project.org>,
* Markus Gruber <gruber@eikon.tum.de>
*
* Rewritten from sonicvibes.c source.
*
* TODO:
* Rewrite better spinlocks
*/
/*
NOTES:
- Capture data is written unaligned starting from dma_base + 1 so I need to
disable mmap and to add a copy callback.
- After several cycle of the following:
while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
a "playback write error (DMA or IRQ trouble?)" may happen.
This is due to playback interrupts not generated.
I suspect a timing issue.
- Sometimes the interrupt handler is invoked wrongly during playback.
This generates some harmless "Unexpected hw_pointer: wrong interrupt
acknowledge".
I've seen that using small period sizes.
Reproducible with:
mpg123 test.mp3 &
hdparm -t -T /dev/hda
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/gameport.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/pcm.h>
#include <sound/opl3.h>
#include <sound/mpu401.h>
#include <sound/initval.h>
#include <sound/tlv.h>
MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
MODULE_DESCRIPTION("ESS Solo-1");
MODULE_LICENSE("GPL");
#if IS_REACHABLE(CONFIG_GAMEPORT)
#define SUPPORT_JOYSTICK 1
#endif
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
#define SL_PCI_LEGACYCONTROL 0x40
#define SL_PCI_CONFIG 0x50
#define SL_PCI_DDMACONTROL 0x60
#define ESSIO_REG_AUDIO2DMAADDR 0
#define ESSIO_REG_AUDIO2DMACOUNT 4
#define ESSIO_REG_AUDIO2MODE 6
#define ESSIO_REG_IRQCONTROL 7
#define ESSDM_REG_DMAADDR 0x00
#define ESSDM_REG_DMACOUNT 0x04
#define ESSDM_REG_DMACOMMAND 0x08
#define ESSDM_REG_DMASTATUS 0x08
#define ESSDM_REG_DMAMODE 0x0b
#define ESSDM_REG_DMACLEAR 0x0d
#define ESSDM_REG_DMAMASK 0x0f
#define ESSSB_REG_FMLOWADDR 0x00
#define ESSSB_REG_FMHIGHADDR 0x02
#define ESSSB_REG_MIXERADDR 0x04
#define ESSSB_REG_MIXERDATA 0x05
#define ESSSB_IREG_AUDIO1 0x14
#define ESSSB_IREG_MICMIX 0x1a
#define ESSSB_IREG_RECSRC 0x1c
#define ESSSB_IREG_MASTER 0x32
#define ESSSB_IREG_FM 0x36
#define ESSSB_IREG_AUXACD 0x38
#define ESSSB_IREG_AUXB 0x3a
#define ESSSB_IREG_PCSPEAKER 0x3c
#define ESSSB_IREG_LINE 0x3e
#define ESSSB_IREG_SPATCONTROL 0x50
#define ESSSB_IREG_SPATLEVEL 0x52
#define ESSSB_IREG_MASTER_LEFT 0x60
#define ESSSB_IREG_MASTER_RIGHT 0x62
#define ESSSB_IREG_MPU401CONTROL 0x64
#define ESSSB_IREG_MICMIXRECORD 0x68
#define ESSSB_IREG_AUDIO2RECORD 0x69
#define ESSSB_IREG_AUXACDRECORD 0x6a
#define ESSSB_IREG_FMRECORD 0x6b
#define ESSSB_IREG_AUXBRECORD 0x6c
#define ESSSB_IREG_MONO 0x6d
#define ESSSB_IREG_LINERECORD 0x6e
#define ESSSB_IREG_MONORECORD 0x6f
#define ESSSB_IREG_AUDIO2SAMPLE 0x70
#define ESSSB_IREG_AUDIO2MODE 0x71
#define ESSSB_IREG_AUDIO2FILTER 0x72
#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
#define ESSSB_IREG_AUDIO2CONTROL1 0x78
#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
#define ESSSB_IREG_AUDIO2 0x7c
#define ESSSB_REG_RESET 0x06
#define ESSSB_REG_READDATA 0x0a
#define ESSSB_REG_WRITEDATA 0x0c
#define ESSSB_REG_READSTATUS 0x0c
#define ESSSB_REG_STATUS 0x0e
#define ESS_CMD_EXTSAMPLERATE 0xa1
#define ESS_CMD_FILTERDIV 0xa2
#define ESS_CMD_DMACNTRELOADL 0xa4
#define ESS_CMD_DMACNTRELOADH 0xa5
#define ESS_CMD_ANALOGCONTROL 0xa8
#define ESS_CMD_IRQCONTROL 0xb1
#define ESS_CMD_DRQCONTROL 0xb2
#define ESS_CMD_RECLEVEL 0xb4
#define ESS_CMD_SETFORMAT 0xb6
#define ESS_CMD_SETFORMAT2 0xb7
#define ESS_CMD_DMACONTROL 0xb8
#define ESS_CMD_DMATYPE 0xb9
#define ESS_CMD_OFFSETLEFT 0xba
#define ESS_CMD_OFFSETRIGHT 0xbb
#define ESS_CMD_READREG 0xc0
#define ESS_CMD_ENABLEEXT 0xc6
#define ESS_CMD_PAUSEDMA 0xd0
#define ESS_CMD_ENABLEAUDIO1 0xd1
#define ESS_CMD_STOPAUDIO1 0xd3
#define ESS_CMD_AUDIO1STATUS 0xd8
#define ESS_CMD_CONTDMA 0xd4
#define ESS_CMD_TESTIRQ 0xf2
#define ESS_RECSRC_MIC 0
#define ESS_RECSRC_AUXACD 2
#define ESS_RECSRC_AUXB 5
#define ESS_RECSRC_LINE 6
#define ESS_RECSRC_NONE 7
#define DAC1 0x01
#define ADC1 0x02
#define DAC2 0x04
/*
*/
#define SAVED_REG_SIZE 32 /* max. number of registers to save */
struct es1938 {
int irq;
unsigned long io_port;
unsigned long sb_port;
unsigned long vc_port;
unsigned long mpu_port;
unsigned long game_port;
unsigned long ddma_port;
unsigned char irqmask;
unsigned char revision;
struct snd_kcontrol *hw_volume;
struct snd_kcontrol *hw_switch;
struct snd_kcontrol *master_volume;
struct snd_kcontrol *master_switch;
struct pci_dev *pci;
struct snd_card *card;
struct snd_pcm *pcm;
struct snd_pcm_substream *capture_substream;
struct snd_pcm_substream *playback1_substream;
struct snd_pcm_substream *playback2_substream;
struct snd_rawmidi *rmidi;
unsigned int dma1_size;
unsigned int dma2_size;
unsigned int dma1_start;
unsigned int dma2_start;
unsigned int dma1_shift;
unsigned int dma2_shift;
unsigned int last_capture_dmaaddr;
unsigned int active;
spinlock_t reg_lock;
spinlock_t mixer_lock;
struct snd_info_entry *proc_entry;
#ifdef SUPPORT_JOYSTICK
struct gameport *gameport;
#endif
#ifdef CONFIG_PM_SLEEP
unsigned char saved_regs[SAVED_REG_SIZE];
#endif
};
static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
static const struct pci_device_id snd_es1938_ids[] = {
{ PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
{ 0, }
};
MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
#define RESET_LOOP_TIMEOUT 0x10000
#define WRITE_LOOP_TIMEOUT 0x10000
#define GET_LOOP_TIMEOUT 0x01000
/* -----------------------------------------------------------------
* Write to a mixer register
* -----------------------------------------------------------------*/
static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
{
unsigned long flags;
spin_lock_irqsave(&chip->mixer_lock, flags);
outb(reg, SLSB_REG(chip, MIXERADDR));
outb(val, SLSB_REG(chip, MIXERDATA));
spin_unlock_irqrestore(&chip->mixer_lock, flags);
dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
}
/* -----------------------------------------------------------------
* Read from a mixer register
* -----------------------------------------------------------------*/
static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
{
int data;
unsigned long flags;
spin_lock_irqsave(&chip->mixer_lock, flags);
outb(reg, SLSB_REG(chip, MIXERADDR));
data = inb(SLSB_REG(chip, MIXERDATA));
spin_unlock_irqrestore(&chip->mixer_lock, flags);
dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
return data;
}
/* -----------------------------------------------------------------
* Write to some bits of a mixer register (return old value)
* -----------------------------------------------------------------*/
static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
unsigned char mask, unsigned char val)
{
unsigned long flags;
unsigned char old, new, oval;
spin_lock_irqsave(&chip->mixer_lock, flags);
outb(reg, SLSB_REG(chip, MIXERADDR));
old = inb(SLSB_REG(chip, MIXERDATA));
oval = old & mask;
if (val != oval) {
new = (old & ~mask) | (val & mask);
outb(new, SLSB_REG(chip, MIXERDATA));
dev_dbg(chip->card->dev,
"Mixer reg %02x was %02x, set to %02x\n",
reg, old, new);
}
spin_unlock_irqrestore(&chip->mixer_lock, flags);
return oval;
}
/* -----------------------------------------------------------------
* Write command to Controller Registers
* -----------------------------------------------------------------*/
static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
{
int i;
unsigned char v;
for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
outb(cmd, SLSB_REG(chip, WRITEDATA));
return;
}
}
dev_err(chip->card->dev,
"snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
}
/* -----------------------------------------------------------------
* Read the Read Data Buffer
* -----------------------------------------------------------------*/
static int snd_es1938_get_byte(struct es1938 *chip)
{
int i;
unsigned char v;
for (i = GET_LOOP_TIMEOUT; i; i--)
if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
return inb(SLSB_REG(chip, READDATA));
dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
return -ENODEV;
}
/* -----------------------------------------------------------------
* Write value cmd register
* -----------------------------------------------------------------*/
static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
{
unsigned long flags;
spin_lock_irqsave(&chip->reg_lock, flags);
snd_es1938_write_cmd(chip, reg);
snd_es1938_write_cmd(chip, val);
spin_unlock_irqrestore(&chip->reg_lock, flags);
dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
}
/* -----------------------------------------------------------------
* Read data from cmd register and return it
* -----------------------------------------------------------------*/
static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
{
unsigned char val;
unsigned long flags;
spin_lock_irqsave(&chip->reg_lock, flags);
snd_es1938_write_cmd(chip, ESS_CMD_READREG);
snd_es1938_write_cmd(chip, reg);
val = snd_es1938_get_byte(chip);
spin_unlock_irqrestore(&chip->reg_lock, flags);
dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
return val;
}
/* -----------------------------------------------------------------
* Write data to cmd register and return old value
* -----------------------------------------------------------------*/
static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
unsigned char val)
{
unsigned long flags;
unsigned char old, new, oval;
spin_lock_irqsave(&chip->reg_lock, flags);
snd_es1938_write_cmd(chip, ESS_CMD_READREG);
snd_es1938_write_cmd(chip, reg);
old = snd_es1938_get_byte(chip);
oval = old & mask;
if (val != oval) {
snd_es1938_write_cmd(chip, reg);
new = (old & ~mask) | (val & mask);
snd_es1938_write_cmd(chip, new);
dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
reg, old, new);
}
spin_unlock_irqrestore(&chip->reg_lock, flags);
return oval;
}
/* --------------------------------------------------------------------
* Reset the chip
* --------------------------------------------------------------------*/
static void snd_es1938_reset(struct es1938 *chip)
{
int i;
outb(3, SLSB_REG(chip, RESET));
inb(SLSB_REG(chip, RESET));
outb(0, SLSB_REG(chip, RESET));
for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
goto __next;
}
}
dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
__next:
snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
/* Demand transfer DMA: 4 bytes per DMA request */
snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
/* Change behaviour of register A1
4x oversampling
2nd channel DAC asynchronous */
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
/* enable/select DMA channel and IRQ channel */
snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
/* Set spatializer parameters to recommended values */
snd_es1938_mixer_write(chip, 0x54, 0x8f);
snd_es1938_mixer_write(chip, 0x56, 0x95);
snd_es1938_mixer_write(chip, 0x58, 0x94);
snd_es1938_mixer_write(chip, 0x5a, 0x80);
}
/* --------------------------------------------------------------------
* Reset the FIFOs
* --------------------------------------------------------------------*/
static void snd_es1938_reset_fifo(struct es1938 *chip)
{
outb(2, SLSB_REG(chip, RESET));
outb(0, SLSB_REG(chip, RESET));
}
static const struct snd_ratnum clocks[2] = {
{
.num = 793800,
.den_min = 1,
.den_max = 128,
.den_step = 1,
},
{
.num = 768000,
.den_min = 1,
.den_max = 128,
.den_step = 1,
}
};
static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
.nrats = 2,
.rats = clocks,
};
static void snd_es1938_rate_set(struct es1938 *chip,
struct snd_pcm_substream *substream,
int mode)
{
unsigned int bits, div0;
struct snd_pcm_runtime *runtime = substream->runtime;
if (runtime->rate_num == clocks[0].num)
bits = 128 - runtime->rate_den;
else
bits = 256 - runtime->rate_den;
/* set filter register */
div0 = 256 - 7160000*20/(8*82*runtime->rate);
if (mode == DAC2) {
snd_es1938_mixer_write(chip, 0x70, bits);
snd_es1938_mixer_write(chip, 0x72, div0);
} else {
snd_es1938_write(chip, 0xA1, bits);
snd_es1938_write(chip, 0xA2, div0);
}
}
/* --------------------------------------------------------------------
* Configure Solo1 builtin DMA Controller
* --------------------------------------------------------------------*/
static void snd_es1938_playback1_setdma(struct es1938 *chip)
{
outb(0x00, SLIO_REG(chip, AUDIO2MODE));
outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
}
static void snd_es1938_playback2_setdma(struct es1938 *chip)
{
/* Enable DMA controller */
outb(0xc4, SLDM_REG(chip, DMACOMMAND));
/* 1. Master reset */
outb(0, SLDM_REG(chip, DMACLEAR));
/* 2. Mask DMA */
outb(1, SLDM_REG(chip, DMAMASK));
outb(0x18, SLDM_REG(chip, DMAMODE));
outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
/* 3. Unmask DMA */
outb(0, SLDM_REG(chip, DMAMASK));
}
static void snd_es1938_capture_setdma(struct es1938 *chip)
{
/* Enable DMA controller */
outb(0xc4, SLDM_REG(chip, DMACOMMAND));
/* 1. Master reset */
outb(0, SLDM_REG(chip, DMACLEAR));
/* 2. Mask DMA */
outb(1, SLDM_REG(chip, DMAMASK));
outb(0x14, SLDM_REG(chip, DMAMODE));
outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
chip->last_capture_dmaaddr = chip->dma1_start;
outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
/* 3. Unmask DMA */
outb(0, SLDM_REG(chip, DMAMASK));
}
/* ----------------------------------------------------------------------
*
* *** PCM part ***
*/
static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
int val;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
val = 0x0f;
chip->active |= ADC1;
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
val = 0x00;
chip->active &= ~ADC1;
break;
default:
return -EINVAL;
}
snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
return 0;
}
static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
/* According to the documentation this should be:
0x13 but that value may randomly swap stereo channels */
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
udelay(10);
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
/* This two stage init gives the FIFO -> DAC connection time to
* settle before first data from DMA flows in. This should ensure
* no swapping of stereo channels. Report a bug if otherwise :-) */
outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
chip->active |= DAC2;
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
outb(0, SLIO_REG(chip, AUDIO2MODE));
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
chip->active &= ~DAC2;
break;
default:
return -EINVAL;
}
return 0;
}
static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
int val;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
val = 5;
chip->active |= DAC1;
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
val = 0;
chip->active &= ~DAC1;
break;
default:
return -EINVAL;
}
snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
return 0;
}
static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
int cmd)
{
switch (substream->number) {
case 0:
return snd_es1938_playback1_trigger(substream, cmd);
case 1:
return snd_es1938_playback2_trigger(substream, cmd);
}
snd_BUG();
return -EINVAL;
}
/* --------------------------------------------------------------------
* First channel for Extended Mode Audio 1 ADC Operation
* --------------------------------------------------------------------*/
static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int u, is8, mono;
unsigned int size = snd_pcm_lib_buffer_bytes(substream);
unsigned int count = snd_pcm_lib_period_bytes(substream);
chip->dma1_size = size;
chip->dma1_start = runtime->dma_addr;
mono = (runtime->channels > 1) ? 0 : 1;
is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
u = snd_pcm_format_unsigned(runtime->format);
chip->dma1_shift = 2 - mono - is8;
snd_es1938_reset_fifo(chip);
/* program type */
snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
/* set clock and counters */
snd_es1938_rate_set(chip, substream, ADC1);
count = 0x10000 - count;
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
/* initialize and configure ADC */
snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
(u ? 0x00 : 0x20) |
(is8 ? 0x00 : 0x04) |
(mono ? 0x40 : 0x08));
// snd_es1938_reset_fifo(chip);
/* 11. configure system interrupt controller and DMA controller */
snd_es1938_capture_setdma(chip);
return 0;
}
/* ------------------------------------------------------------------------------
* Second Audio channel DAC Operation
* ------------------------------------------------------------------------------*/
static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int u, is8, mono;
unsigned int size = snd_pcm_lib_buffer_bytes(substream);
unsigned int count = snd_pcm_lib_period_bytes(substream);
chip->dma2_size = size;
chip->dma2_start = runtime->dma_addr;
mono = (runtime->channels > 1) ? 0 : 1;
is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
u = snd_pcm_format_unsigned(runtime->format);
chip->dma2_shift = 2 - mono - is8;
snd_es1938_reset_fifo(chip);
/* set clock and counters */
snd_es1938_rate_set(chip, substream, DAC2);
count >>= 1;
count = 0x10000 - count;
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
/* initialize and configure Audio 2 DAC */
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
(mono ? 0 : 2) | (is8 ? 0 : 1));
/* program DMA */
snd_es1938_playback1_setdma(chip);
return 0;
}
static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int u, is8, mono;
unsigned int size = snd_pcm_lib_buffer_bytes(substream);
unsigned int count = snd_pcm_lib_period_bytes(substream);
chip->dma1_size = size;
chip->dma1_start = runtime->dma_addr;
mono = (runtime->channels > 1) ? 0 : 1;
is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
u = snd_pcm_format_unsigned(runtime->format);
chip->dma1_shift = 2 - mono - is8;
count = 0x10000 - count;
/* reset */
snd_es1938_reset_fifo(chip);
snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
/* set clock and counters */
snd_es1938_rate_set(chip, substream, DAC1);
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
/* initialized and configure DAC */
snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
0x90 | (mono ? 0x40 : 0x08) |
(is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
/* program DMA */
snd_es1938_playback2_setdma(chip);
return 0;
}
static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
{
switch (substream->number) {
case 0:
return snd_es1938_playback1_prepare(substream);
case 1:
return snd_es1938_playback2_prepare(substream);
}
snd_BUG();
return -EINVAL;
}
/* during the incrementing of dma counters the DMA register reads sometimes
returns garbage. To ensure a valid hw pointer, the following checks which
should be very unlikely to fail are used:
- is the current DMA address in the valid DMA range ?
- is the sum of DMA address and DMA counter pointing to the last DMA byte ?
One can argue this could differ by one byte depending on which register is
updated first, so the implementation below allows for that.
*/
static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
size_t ptr;
#if 0
size_t old, new;
/* This stuff is *needed*, don't ask why - AB */
old = inw(SLDM_REG(chip, DMACOUNT));
while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
old = new;
ptr = chip->dma1_size - 1 - new;
#else
size_t count;
unsigned int diff;
ptr = inl(SLDM_REG(chip, DMAADDR));
count = inw(SLDM_REG(chip, DMACOUNT));
diff = chip->dma1_start + chip->dma1_size - ptr - count;
if (diff > 3 || ptr < chip->dma1_start
|| ptr >= chip->dma1_start+chip->dma1_size)
ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
else
chip->last_capture_dmaaddr = ptr; /* good, remember it */
ptr -= chip->dma1_start;
#endif
return ptr >> chip->dma1_shift;
}
static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
size_t ptr;
#if 1
ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
#else
ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
#endif
return ptr >> chip->dma2_shift;
}
static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
size_t ptr;
size_t old, new;
#if 1
/* This stuff is *needed*, don't ask why - AB */
old = inw(SLDM_REG(chip, DMACOUNT));
while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
old = new;
ptr = chip->dma1_size - 1 - new;
#else
ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
#endif
return ptr >> chip->dma1_shift;
}
static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
{
switch (substream->number) {
case 0:
return snd_es1938_playback1_pointer(substream);
case 1:
return snd_es1938_playback2_pointer(substream);
}
snd_BUG();
return -EINVAL;
}
static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
int channel, unsigned long pos,
void __user *dst, unsigned long count)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct es1938 *chip = snd_pcm_substream_chip(substream);
if (snd_BUG_ON(pos + count > chip->dma1_size))
return -EINVAL;
if (pos + count < chip->dma1_size) {
if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
return -EFAULT;
} else {
if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
return -EFAULT;
if (put_user(runtime->dma_area[0],
((unsigned char __user *)dst) + count - 1))
return -EFAULT;
}
return 0;
}
static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
int channel, unsigned long pos,
void *dst, unsigned long count)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct es1938 *chip = snd_pcm_substream_chip(substream);
if (snd_BUG_ON(pos + count > chip->dma1_size))
return -EINVAL;
if (pos + count < chip->dma1_size) {
memcpy(dst, runtime->dma_area + pos + 1, count);
} else {
memcpy(dst, runtime->dma_area + pos + 1, count - 1);
runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
}
return 0;
}
/* ----------------------------------------------------------------------
* Audio1 Capture (ADC)
* ----------------------------------------------------------------------*/
static const struct snd_pcm_hardware snd_es1938_capture =
{
.info = (SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER),
.formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
.rate_min = 6000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
.period_bytes_min = 64,
.period_bytes_max = 0x8000,
.periods_min = 1,
.periods_max = 1024,
.fifo_size = 256,
};
/* -----------------------------------------------------------------------
* Audio2 Playback (DAC)
* -----------------------------------------------------------------------*/
static const struct snd_pcm_hardware snd_es1938_playback =
{
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
.rate_min = 6000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
.period_bytes_min = 64,
.period_bytes_max = 0x8000,
.periods_min = 1,
.periods_max = 1024,
.fifo_size = 256,
};
static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
if (chip->playback2_substream)
return -EAGAIN;
chip->capture_substream = substream;
runtime->hw = snd_es1938_capture;
snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
&hw_constraints_clocks);
snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
return 0;
}
static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
switch (substream->number) {
case 0:
chip->playback1_substream = substream;
break;
case 1:
if (chip->capture_substream)
return -EAGAIN;
chip->playback2_substream = substream;
break;
default:
snd_BUG();
return -EINVAL;
}
runtime->hw = snd_es1938_playback;
snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
&hw_constraints_clocks);
snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
return 0;
}
static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
chip->capture_substream = NULL;
return 0;
}
static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
{
struct es1938 *chip = snd_pcm_substream_chip(substream);
switch (substream->number) {
case 0:
chip->playback1_substream = NULL;
break;
case 1:
chip->playback2_substream = NULL;
break;
default:
snd_BUG();
return -EINVAL;
}
return 0;
}
static const struct snd_pcm_ops snd_es1938_playback_ops = {
.open = snd_es1938_playback_open,
.close = snd_es1938_playback_close,
.prepare = snd_es1938_playback_prepare,
.trigger = snd_es1938_playback_trigger,
.pointer = snd_es1938_playback_pointer,
};
static const struct snd_pcm_ops snd_es1938_capture_ops = {
.open = snd_es1938_capture_open,
.close = snd_es1938_capture_close,
.prepare = snd_es1938_capture_prepare,
.trigger = snd_es1938_capture_trigger,
.pointer = snd_es1938_capture_pointer,
.copy_user = snd_es1938_capture_copy,
.copy_kernel = snd_es1938_capture_copy_kernel,
};
static int snd_es1938_new_pcm(struct es1938 *chip, int device)
{
struct snd_pcm *pcm;
int err;
if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
return err;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);