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ConchuOD

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Commits on Mar 17, 2023

• rtc: mpfs: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE

  

  ConchuOD

  authored and

  alexandrebelloni

  committedMar 17, 2023
  f12f0c7

Commits on Mar 16, 2023

• i2c: microchip-core: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE

  

  ConchuOD

  authored and

  wsakernel

  committedMar 16, 2023
  819c734

• usb: musb: mpfs: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE

  

  ConchuOD

  authored and

  gregkh

  committedMar 16, 2023
  a20bf02

Commits on Mar 15, 2023

• riscv: dts: microchip: fix the mpfs' mailbox regs

  ConchuOD

  committedMar 15, 2023
  e77da13

Commits on Mar 9, 2023

• RISC-V: Don't check text_mutex during stop_machine

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedMar 9, 2023
  2a8db5e

Commits on Mar 7, 2023

• RISC-V: fix taking the text_mutex twice during sifive errata patching

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedMar 7, 2023
  bf89b7e

• riscv: dts: microchip: add mpfs specific macb reset support

  ConchuOD

  committedMar 7, 2023
  0e9b70c

Commits on Mar 6, 2023

• clk: k210: remove an implicit 64-bit division

  

  ConchuOD

  authored and

  bebarino

  committedMar 6, 2023
  89dc65a

• MAINTAINERS: add missing clock driver coverage for Microchip FPGAs

  

  ConchuOD

  authored and

  bebarino

  committedMar 6, 2023
  2624387

Commits on Feb 22, 2023

• RISC-V: add a spin_shadow_stack declaration

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 22, 2023
  eb9be83

• RISC-V: take text_mutex during alternative patching

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 22, 2023
  9493e6f

Commits on Feb 21, 2023

• dt-bindings: drop Sagar Kadam from SiFive binding maintainership

  

  ConchuOD

  authored and

  robherring

  committedFeb 21, 2023
  fb4b06f

Commits on Feb 16, 2023

• dt-bindings: riscv: correct starfive visionfive 2 compatibles

  

  ConchuOD

  authored and

  arndb

  committedFeb 16, 2023
  e43efb6

Commits on Feb 15, 2023

• RISC-V: remove toolchain version checks for Zicbom

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 15, 2023
  75c5390

• RISC-V: replace cbom instructions with an insn-def

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 15, 2023
  dd23e95

• dt-bindings: riscv: add a capacity-dmips-mhz cpu property

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 15, 2023
  9919945

• dt-bindings: arm: move cpu-capacity to a shared loation

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 15, 2023
  7d20783

• RISC-V: re-order Kconfig selects alphanumerically

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 15, 2023
  5f365c1

• Documentation: riscv: fix insufficient list item indent

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedFeb 15, 2023
  2a5303b

Commits on Feb 13, 2023

• RISC-V: time: initialize hrtimer based broadcast clock event device

  

  ConchuOD

  authored and

  dlezcano

  committedFeb 13, 2023
  8b3b8fb

Commits on Feb 9, 2023

• dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties

  

  ConchuOD

  authored and

  gregkh

  committedFeb 9, 2023
  370f696

Commits on Jan 25, 2023

• Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM"

  ConchuOD

  committedJan 25, 2023
  d9c36d0

• riscv: dts: microchip: add the Aldec TySoM's devicetree

  ConchuOD

  committedJan 25, 2023
  497e6b3

Commits on Jan 20, 2023

• dt-bindings: riscv: microchip: document the Aldec TySoM

  ConchuOD

  committedJan 20, 2023
  ea913d8

• dt-bindings: vendor-prefixes: Add entry for Aldec

  ConchuOD

  committedJan 20, 2023
  f6beee9

• Merge patch series "JH7110 PMU Support"

  ConchuOD

  committedJan 20, 2023
  f346032

• MAINTAINERS: add an IRC entry for RISC-V

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedJan 20, 2023
  6d0cc1b

Commits on Jan 18, 2023

• Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedJan 18, 2023
  f07b2b3

• RISC-V: resort all extensions in consistent orders

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedJan 18, 2023
  80c200b

• RISC-V: clarify ISA string ordering rules in cpu.c

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedJan 18, 2023
  99e2266

• RISC-V: fix incorrect type of ARCH_CANAAN_K210_DTB_SOURCE

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedJan 18, 2023
  6fb4c59

Commits on Jan 17, 2023

• dt-bindings: riscv: add SBI PMU event mappings

  

  ConchuOD

  authored and

  robherring

  committedJan 17, 2023
  7e38085

Commits on Jan 13, 2023

• Documentation: process: Document suitability of Proton Mail for kernel development

  

  ConchuOD

  authored and

  Jonathan Corbet

  committedJan 13, 2023
  1d2ed92

Commits on Jan 6, 2023

• dt-bindings: riscv: fix single letter canonical order

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedJan 6, 2023
  a943385

• dt-bindings: riscv: fix underscore requirement for multi-letter extensions

  

  ConchuOD

  authored and

  palmer-dabbelt

  committedJan 6, 2023
  ec64efc

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