From fc2ed2cef2c89cdc6fac142c8eaa76593abc6b00 Mon Sep 17 00:00:00 2001
From: "petarj@mips.com" <petarj@mips.com@0039d316-1c4b-4281-b951-d872f2087c98>
Date: Thu, 9 Aug 2012 14:02:14 +0000
Subject: [PATCH] [MIPS] Add DEBUG_BREAK() for MIPS architecture.

Small change to add correct asm break instruction for MIPS architecture.

BUG= https://code.google.com/p/chromium/issues/detail?id=130022
TEST=make chrome

Review URL: https://chromiumcodereview.appspot.com/10834234

git-svn-id: svn://svn.chromium.org/chrome/trunk/src@150789 0039d316-1c4b-4281-b951-d872f2087c98
---
 base/debug/debugger_posix.cc | 2 ++
 1 file changed, 2 insertions(+)
 mode change 100644 => 100755 base/debug/debugger_posix.cc

diff --git a/base/debug/debugger_posix.cc b/base/debug/debugger_posix.cc
old mode 100644
new mode 100755
index 4139f73c61839c..796b0e8c528dcd
--- a/base/debug/debugger_posix.cc
+++ b/base/debug/debugger_posix.cc
@@ -222,6 +222,8 @@ bool BeingDebugged() {
 // ARM && !ANDROID
 #define DEBUG_BREAK() asm("bkpt 0")
 #endif
+#elif defined(ARCH_CPU_MIPS_FAMILY)
+#define DEBUG_BREAK() asm("break 2")
 #else
 #define DEBUG_BREAK() asm("int3")
 #endif