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Commits on May 31, 2024

• git action cache fix?

  Dolu1990

  committedMay 31, 2024
  298e5ea

• Fix #101

  Dolu1990

  committedMay 31, 2024
  3008ac6

Commits on May 30, 2024

• Fix #104

  Dolu1990

  committedMay 30, 2024
  c5e4d74

• Fix #105

  Dolu1990

  committedMay 30, 2024
  9115f12

• Fix #106 #103

  Dolu1990

  committedMay 30, 2024
  ed2df82

Commits on May 29, 2024

• Fix #103

  Dolu1990

  committedMay 29, 2024
  e5f3abb

Commits on Apr 25, 2024

• Update to Scala 2.12 and fix litex mbus offset

  Dolu1990

  committedApr 25, 2024
  f335738

Commits on Apr 23, 2024

• sync

  Dolu1990

  committedApr 23, 2024
  ab8e27d

Commits on Mar 6, 2024

• No more self holsted action

  Dolu1990

  committedMar 6, 2024
  8816542

• Reduce regression time

  Dolu1990

  committedMar 6, 2024
  b0b1409

• Merge pull request #85 from Bill94l/main

  Dolu1990

  committedMar 6, 2024
  646cc0f

Commits on Mar 4, 2024

• Fix wrong mask for 64 bits IO access

  

  bi262934

  committedMar 4, 2024
  9d1eb83

Commits on Feb 15, 2024

• Merge pull request #80 from ldoolitt/main

  Dolu1990

  committedFeb 15, 2024
  8f0bd88

• README.md: touch-ups by a native English speaker

  ldoolitt

  committedFeb 15, 2024
  0625574

Commits on Feb 12, 2024

• Merge branch 'asic'

  Dolu1990

  committedFeb 12, 2024
  75dadd3

• Add asic option for register file blackbox

  Dolu1990

  committedFeb 12, 2024
  c750a9b

Commits on Feb 8, 2024

• cleaning

  Dolu1990

  committedFeb 8, 2024
  0a0b2be

• sky130 remove MultiPortWritesSymplifier

  Dolu1990

  committedFeb 8, 2024
  baaadd0

• Add CombRamBlackboxer to asic gen

  Dolu1990

  committedFeb 8, 2024
  488c339

• LatchReg file now use ff core control path to ease timing constraint

  Dolu1990

  committedFeb 8, 2024
  6aeaba2

• Add CombRamBlackboxer

  Dolu1990

  committedFeb 8, 2024
  d51b924

• Fix mmuSets not being applied to lsu

  Dolu1990

  committedFeb 8, 2024
  9e14835

Commits on Feb 5, 2024

• cleanup mulPlugin

  Dolu1990

  committedFeb 5, 2024
  4640c0a

• asic config now integrate MMU / LSU by default

  Dolu1990

  committedFeb 5, 2024
  3404d9a

• openlane add SYNTH_AUTONAME param to help with timeing analysis

  Dolu1990

  committedFeb 5, 2024
  79ea10e

• Add mmuSets parameter

  Dolu1990

  committedFeb 5, 2024
  4b6ae36

• Allow single way data cache

  Dolu1990

  committedFeb 5, 2024
  f993994

Commits on Jan 30, 2024

• Merge branch 'asic'

  Dolu1990

  committedJan 30, 2024
  60cb2dd

• Merge branch 'main' into asic

  Dolu1990

  committedJan 30, 2024
  e562351

• add --no-lsu arguement

  Dolu1990

  committedJan 30, 2024
  54cf78a

• Fix datacache without coherency

  Dolu1990

  committedJan 30, 2024
  93356b4

• Add missing change

  Dolu1990

  committedJan 30, 2024
  87642e6

• Add latch register file fakeRatio parameter as a ASIC RF workaround

  Dolu1990

  committedJan 30, 2024
  c8e0cf4

Commits on Jan 18, 2024

• fix #77 Update NaxSoftware

  Dolu1990

  committedJan 18, 2024
  3fa2511

Commits on Jan 16, 2024

• Merge branch 'asic'

  Dolu1990

  committedJan 16, 2024
  8bd5527

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