The RIFFA development repository

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

iCESugar FPGA Board (base on iCE40UP5k)

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

Hardware implementation of the SHA-256 cryptographic hash function

A full-speed device-side USB peripheral core written in Verilog.

Support files for participating in a Fomu workshop

A simple implementation of a UART modem in Verilog.

XCrypto: a cryptographic ISE for RISC-V

Anlogic examples with Yosys

SoC for Pblaze FPGA

FMC template board