From b59adea4b8231ca11b9aed2dc53faf5f453d9f45 Mon Sep 17 00:00:00 2001
From: "L. E. Segovia" <amy@amyspark.me>
Date: Fri, 26 Jan 2024 18:49:49 -0300
Subject: [PATCH] riscv_debug: Fix building with MSVC which does not allow C23
 style initialization

---
 src/target/riscv_debug.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/target/riscv_debug.c b/src/target/riscv_debug.c
index 6fa13ef4e59..f9974a8a462 100644
--- a/src/target/riscv_debug.c
+++ b/src/target/riscv_debug.c
@@ -523,7 +523,7 @@ static uint32_t riscv_hart_discover_isa(riscv_hart_s *const hart)
 	do {
 		DEBUG_INFO("Attempting %u-bit read on misa\n", hart->access_width);
 		/* Try reading the register on the guessed width */
-		uint32_t isa_data[4] = {};
+		uint32_t isa_data[4] = {0U};
 		bool result = riscv_csr_read(hart, RV_ISA, isa_data);
 		if (result) {
 			if (hart->access_width == 128U)