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build/efinix/common: Enable back SDRInput since support fixed with re… ci #3308: Commit 431feb0 pushed by enjoy-digital
September 26, 2024 16:01 25m 0s master
master
September 26, 2024 16:01 25m 0s
build/efinix/common: Switch to LiteXModule. ci #3307: Commit 9760493 pushed by enjoy-digital
September 26, 2024 15:50 25m 5s master
master
September 26, 2024 15:50 25m 5s
Merge pull request #2083 from VOGL-electronic/efinix_common_improve ci #3306: Commit 95e5e73 pushed by enjoy-digital
September 26, 2024 15:41 25m 28s master
master
September 26, 2024 15:41 25m 28s
Merge pull request #2079 from VOGL-electronic/efinix_iface_fixups ci #3305: Commit c67dfa8 pushed by enjoy-digital
September 26, 2024 15:31 26m 3s master
master
September 26, 2024 15:31 26m 3s
build: efinix: EfinixTristateImpl: use GPIO Bus ci #3304: Pull request #2083 opened by maass-hamburg
September 26, 2024 14:09 26m 43s VOGL-electronic:efinix_common_improve
VOGL-electronic:efinix_common_improve
September 26, 2024 14:09 26m 43s
build: efinix: ifacewriter: some fixes ci #3303: Pull request #2079 synchronize by maass-hamburg
September 26, 2024 13:11 25m 17s VOGL-electronic:efinix_iface_fixups
VOGL-electronic:efinix_iface_fixups
September 26, 2024 13:11 25m 17s
build/efinix/common: Disable SDRInput for now since breaking designs,… ci #3302: Commit b135f71 pushed by enjoy-digital
September 26, 2024 10:59 24m 58s master
master
September 26, 2024 10:59 24m 58s
build/efinix/common: Update EfinixSDRInputImpl and minor cleanup. ci #3301: Commit b5e9147 pushed by enjoy-digital
September 26, 2024 09:50 24m 48s master
master
September 26, 2024 09:50 24m 48s
Merge pull request #2081 from VOGL-electronic/build_efinix_add_sdr_input ci #3300: Commit 0e337e2 pushed by enjoy-digital
September 26, 2024 09:43 24m 16s master
master
September 26, 2024 09:43 24m 16s
Merge pull request #2078 from VOGL-electronic/efinix_add_ipm ci #3299: Commit a19fbb7 pushed by enjoy-digital
September 26, 2024 09:42 25m 3s master
master
September 26, 2024 09:42 25m 3s
Merge pull request #2082 from enjoy-digital/efinix_iface_signal_names ci #3298: Commit b11cc8c pushed by enjoy-digital
September 26, 2024 09:42 26m 6s master
master
September 26, 2024 09:42 26m 6s
Efinix iface signal names. ci #3297: Pull request #2082 synchronize by enjoy-digital
September 26, 2024 08:38 25m 15s efinix_iface_signal_names
efinix_iface_signal_names
September 26, 2024 08:38 25m 15s
build/efinix/common: Deprecate passing clk as str to avoid previous a… ci #3296: Commit 39d292a pushed by enjoy-digital
September 26, 2024 08:38 25m 13s efinix_iface_signal_names
efinix_iface_signal_names
September 26, 2024 08:38 25m 13s
Efinix iface signal names. ci #3295: Pull request #2082 opened by enjoy-digital
September 26, 2024 08:15 25m 50s efinix_iface_signal_names
efinix_iface_signal_names
September 26, 2024 08:15 25m 50s
build/efinix/common: Directly pass ClockSignal/Signal to blocks and l… ci #3294: Commit a3a55fc pushed by enjoy-digital
September 26, 2024 08:15 24m 43s efinix_iface_signal_names
efinix_iface_signal_names
September 26, 2024 08:15 24m 43s
build: efinix: common.py; add SDRInput ci #3293: Pull request #2081 opened by maass-hamburg
September 25, 2024 15:20 25m 36s VOGL-electronic:build_efinix_add_sdr_input
VOGL-electronic:build_efinix_add_sdr_input
September 25, 2024 15:20 25m 36s
build: efinix: ifacewriter: some fixes ci #3292: Pull request #2079 opened by maass-hamburg
September 25, 2024 09:13 24m 58s VOGL-electronic:efinix_iface_fixups
VOGL-electronic:efinix_iface_fixups
September 25, 2024 09:13 24m 58s
soc/cores/vexriscv_smp: Add the generation of the default sim config … ci #3291: Commit c3e8736 pushed by Dolu1990
September 25, 2024 08:38 24m 50s master
master
September 25, 2024 08:38 24m 50s
build/sim/core/veril.cpp: Flush trace file on finish, fix issue with … ci #3290: Commit b86d76b pushed by enjoy-digital
September 25, 2024 06:57 24m 31s master
master
September 25, 2024 06:57 24m 31s
build/sim/core/veril.cpp: Flush and close trace file on finish, fix i… ci #3289: Commit 00f72e1 pushed by enjoy-digital
September 25, 2024 06:54 25m 45s master
master
September 25, 2024 06:54 25m 45s
build: efinix: add function to add ip ci #3288: Pull request #2078 opened by maass-hamburg
September 24, 2024 10:01 25m 6s VOGL-electronic:efinix_add_ipm
VOGL-electronic:efinix_add_ipm
September 24, 2024 10:01 25m 6s
soc/interconnect/stream: Add Delay module. ci #3287: Commit c95a6e0 pushed by enjoy-digital
September 23, 2024 10:23 24m 53s master
master
September 23, 2024 10:23 24m 53s
CHANGES.md: Update. ci #3286: Commit b2f63b3 pushed by enjoy-digital
September 20, 2024 11:00 24m 31s master
master
September 20, 2024 11:00 24m 31s
build: io.py: add QDR input, output and tristate ci #3285: Pull request #2077 synchronize by maass-hamburg
September 19, 2024 13:13 25m 18s VOGL-electronic:add_qdr_gpios
VOGL-electronic:add_qdr_gpios
September 19, 2024 13:13 25m 18s
Merge pull request #2075 from trabucayre/efinix_clkinput_signal ci #3284: Commit baff4c6 pushed by enjoy-digital
September 19, 2024 09:59 24m 48s master
master
September 19, 2024 09:59 24m 48s