From d6081de7e011327af089475bb60593423963526a Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Oct 2016 16:50:17 +0530 Subject: [PATCH 1/4] net: phy: dp83867: Add documentation for optional impedance control Add documention of ti,min-output-impedance and ti,max-output-impedance which can be used to correct MAC impedance mismatch using phy extended registers. Signed-off-by: Mugunthan V N Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 5d21141a68b547..85bf945b898f0d 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -9,6 +9,18 @@ Required properties: - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values +Optional property: + - ti,min-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + minimum value (35 ohms). + - ti,max-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + maximum value (70 ohms). + +Note: ti,min-output-impedance and ti,max-output-impedance are mutually + exclusive. When both properties are present ti,max-output-impedance + takes precedence. + Default child nodes are standard Ethernet PHY device nodes as described in Documentation/devicetree/bindings/net/phy.txt From ed838fe937dbcdcf7c0444a5b62edfec6ecd753c Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Oct 2016 16:50:18 +0530 Subject: [PATCH 2/4] net: phy: dp83867: add support for MAC impedance configuration Add support for programmable MAC impedance configuration Signed-off-by: Mugunthan V N Signed-off-by: David S. Miller --- drivers/net/phy/dp83867.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 91177a4a32ad21..1b639242f9e231 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -33,6 +33,7 @@ /* Extended Registers */ #define DP83867_RGMIICTL 0x0032 #define DP83867_RGMIIDCTL 0x0086 +#define DP83867_IO_MUX_CFG 0x0170 #define DP83867_SW_RESET BIT(15) #define DP83867_SW_RESTART BIT(14) @@ -62,10 +63,17 @@ /* RGMIIDCTL bits */ #define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4 +/* IO_MUX_CFG bits */ +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f + +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX 0x0 +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN 0x1f + struct dp83867_private { int rx_id_delay; int tx_id_delay; int fifo_depth; + int io_impedance; }; static int dp83867_ack_interrupt(struct phy_device *phydev) @@ -111,6 +119,14 @@ static int dp83867_of_init(struct phy_device *phydev) if (!of_node) return -ENODEV; + dp83867->io_impedance = -EINVAL; + + /* Optional configuration */ + if (of_property_read_bool(of_node, "ti,max-output-impedance")) + dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX; + else if (of_property_read_bool(of_node, "ti,min-output-impedance")) + dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN; + ret = of_property_read_u32(of_node, "ti,rx-internal-delay", &dp83867->rx_id_delay); if (ret) @@ -184,6 +200,18 @@ static int dp83867_config_init(struct phy_device *phydev) phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL, DP83867_DEVADDR, delay); + + if (dp83867->io_impedance >= 0) { + val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG, + DP83867_DEVADDR); + + val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + val |= dp83867->io_impedance & + DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + + phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG, + DP83867_DEVADDR, val); + } } return 0; From b76db38cd8aee9f048c849a8f646695e42c762ba Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Oct 2016 16:50:19 +0530 Subject: [PATCH 3/4] ARM: dts: dra72-evm-revc: add phy impedance settings The default impedance settings of the phy is not the optimal value, due to this the second ethernet is not working. Fix it with correct values which makes the second ethernet port to work. Signed-off-by: Mugunthan V N Signed-off-by: David S. Miller --- arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts index 064b322a7a042e..54503673e15ffb 100644 --- a/arch/arm/boot/dts/dra72-evm-revc.dts +++ b/arch/arm/boot/dts/dra72-evm-revc.dts @@ -62,6 +62,7 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-impedance; }; dp83867_1: ethernet-phy@3 { @@ -69,5 +70,6 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-imepdance; }; }; From 1f0655444201ff770efb66078808ecefbc54dfe9 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Oct 2016 16:50:20 +0530 Subject: [PATCH 4/4] ARM: dts: dra72-evm-revc: fix correct phy delay The current delay settings of the phy are not the optimal value, fix it with correct values. Signed-off-by: Mugunthan V N Signed-off-by: David S. Miller --- arch/arm/boot/dts/dra72-evm-revc.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts index 54503673e15ffb..3b23b32e1b307b 100644 --- a/arch/arm/boot/dts/dra72-evm-revc.dts +++ b/arch/arm/boot/dts/dra72-evm-revc.dts @@ -59,16 +59,16 @@ &davinci_mdio { dp83867_0: ethernet-phy@2 { reg = <2>; - ti,rx-internal-delay = ; - ti,tx-internal-delay = ; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; ti,fifo-depth = ; ti,min-output-impedance; }; dp83867_1: ethernet-phy@3 { reg = <3>; - ti,rx-internal-delay = ; - ti,tx-internal-delay = ; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; ti,fifo-depth = ; ti,min-output-imepdance; };