-
Notifications
You must be signed in to change notification settings - Fork 1
/
ChangeLog
5853 lines (4670 loc) · 253 KB
/
ChangeLog
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
Sun Jun 06 20:52:27 2010 Matthew Fredette <fredette@alum.mit.edu>
* Release 0.8 out.
Sat Jun 05 19:56:37 2010 Matt Fredette <fredette@alum.mit.edu>
* TODO: Updated.
* configure.in: Bumped version to 0.8.
* ic/ncr5380.c: Changed or cast various tme_bus_addr_t to
tme_bus_addr32_t. In struct tme_ncr5380, store an actual TLB entry
instead of a pointer to an allocated entry.
(_tme_ncr5380_bus_tlb_fill): Replaced the call to tme_bus_tlb_back()
with a plain structure copy.
(_tme_ncr5380_connection_make_bus): Call tme_bus_device_tlb_set_add()
to add the TLB entry to the connection.
* ic/ncr53c9x.c: Changed or cast various tme_bus_addr_t to
tme_bus_addr32_t. In struct tme_ncr53c9x, store an actual TLB entry
instead of a pointer to an allocated entry. Added
tme_ncr53c9x_detected_scsi_reset.
(_tme_ncr53c9x_update): When SCSI RST is first detected, issue a SCSI
reset interrupt if it hasn't been disabled. In
TME_NCR53C9X_CMD_RESET_BUS, no longer signal a SCSI reset interrupt.
This will be done when the SCSI RST is detected.
(_tme_ncr53c9x_callout): Fixed bugs where we wouldn't always wrap the
FIFO head and tail.
Replaced the call to tme_bus_tlb_back() with a plain structure copy.
When a SCSI DMA cycle is transferring out to the SCSI bus, only
initially clear the SCSI DMA buffer if DMA is not running - if DMA is
running, and the data FIFO is empty, and the TLB entry doesn't support
fast reading, the code that sets up a transfer into the data FIFO
needs to know how much space is available in the data FIFO starting at
the tail, until the end of the data FIFO. Also call
_tme_ncr53c9x_fifo_data_update() to update the Current FIFO register.
(_tme_ncr53c9x_connection_make_bus): Call tme_bus_device_tlb_set_add()
to add the TLB entry to the connection.
* ic/z8530.c (_tme_z8530_rr2_update): Now take the single RR3
interrupt bit, or zero, to use for the modified interrupt vector in
RR2.
(_tme_z8530_int_pending): Now call _tme_z8530_rr2_update() to update
the modified interrupt vector in RR2.
(_tme_z8530_intack): Fixed a bug where we would accept an interrupt
acknowledge even if the IEI pin was tied low. Get the vector directly
from the channel B RR2.
(_tme_z8530_bus_cycle): In TME_Z8530_WR0_CMD_RESET_IUS, no longer call
_tme_z8530_rr2_update(). The eventual interrupt check for
TME_Z8530_CALLOUT_INT will update RR2.
* ic/sparc/sparc-fpu.c (tme_sparc_fpu_exception_check): On sparc64,
when the exception is not an ieee754 exception, use the
fp_exception_other trap.
* ic/sparc/sparc-impl.h [_TME_SPARC_STATS] [TME_HAVE_RECODE]: Track
the number of recode source hash misses.
Declare tme_sparc32_recode_insn_current() and
tme_sparc64_recode_insn_current().
[!_TME_SPARC_RECODE_VERIFY] tme_sparc_recode_verify_reg_tick_now():
Silence a possible known-nonzero warning.
* ic/sparc/sparc-insns-auto.sh: Fixed some comments.
* ic/sparc/sparc-misc.c (_tme_sparc_runlength): Added.
(_tme_sparc_command): Added the run-length and prom-delay-factor
commands.
(tme_sparc_new): Removed the prom-delay-factor option. Now call
_tme_sparc_runlength() to set the initial run length.
(tme_sparc32_external_check): 32-bit SPARCs default to no interrupt
acknowledge cycle.
(tme_sparc_itlb_current): Fixed pointer arithmetic bugs in the
no-recode case.
* ic/sparc/sparc-rc-insns.c: TME_SPARC_RECODE_INSN_LD and
TME_SPARC_RECODE_INSN_ST instructions no longer update the instruction
register. mulscc only needs the simplest assist.
(tme_sparc_recode_insn_current): Added.
(tme_sparc_recode_insn_assist_redispatch): Added a comment about the
PC we check. Rewritten to prepare for future additional redispatch
conditions.
(_tme_sparc_recode_insn_assist_full): Fixed a bug where we wouldn't
use TME_SPARC_G0_OFFSET(ic) to find the %g0 to zero.
(_tme_sparc_recode_recode): Fixed bugs in checking the immediate ASI
of a v9 ld*a instruction for the default unrestricted ASI with the
right endianness.
Fixed a bug where we would test for the branch target being near or
far after we had possibly updated the displacement. Fixed various
other bugs in testing control transfer targets for near or far.
If the second source operand is an immediate zero, make a
TME_RECODE_OPERAND_ZERO instead of a TME_RECODE_OPERAND_IMM.
* ic/sparc/sparc-rc-ls.c (_tme_sparc_recode_ls_assist_check): Get the
instruction from ic->_tme_sparc_insn, since the instruction register
isn't updated for assisted loads and stores.
(_tme_sparc_recode_ls_assist_ld): Use tme_sparc_recode_insn_current()
to get the instruction, and check that the instruction is a load.
Decode rd from the current instruction, in case it's not the original
recoded instruction. Zero %g0, in case the load changed it. Do any
required redispatch after we assisted a nonoriginal load instruction
(or a load instruction that otherwise requires a redispatch).
(_tme_sparc_recode_ls_assist_st): Use tme_sparc_recode_insn_current()
to get the instruction, and check that the instruction is a store.
* ic/sparc/sparc-rc-verify.c (tme_sparc_recode_verify_begin): When
verifying is being turned on, return immediately after calling
tme_sparc_recode_invalidate_all(), since it will leave the current
instructions thunk unrunnable. Remember the current instruction TLB
token.
(tme_sparc_recode_verify_end): Unbusy any current instruction TLB
token used by the normal execution. Before the replay begins,
validate the replay instruction TLB entry When the replay ends, unbusy
and invalidate the current instruction TLB token.
Added more structure members to ignore. Before returning to normal
post instructions thunk handling, rebusy any current instruction TLB
entry.
(_tme_sparc_recode_verify_init): Initialize the replay TLB tokens as
invalid.
* ic/sparc/sparc-recode.c (TME_SPARC_RECODE_RW_THUNK_INDEX): Added
missing parentheses around all of the sparc64 load/store features.
(tme_sparc_recode): Count recode source hash misses.
(tme_sparc_recode_init): Mark the temporary registers as temporary.
Increase the size of the thunks memory.
* ic/sparc/stp103x.c (_tme_stp103x_rdasr):
(_tme_stp103x_wrasr): Don't return the result of a function that
returns void.
(_tme_stp103x_ls_address_map_phys): Fixed a bug where we wouldn't map
a bypass ASI as usable by nonprivileged code.
(_tme_stp103x_ls_address_map): Fixeds where we wouldn't map an address
when the MMU is disabled, or when the mapping is unprivileged, as
usable by both nonprivileged and privileged code.
(_tme_stp103x_ls_asi_tlb_data_access): Catch an atomic access to a TLB
data access register. Invalidate any sparc TLB entries when a stp103x
TLB entry is written.
(_tme_stp103x_tick_compare_th): Now use tme_gettimeofday().
* ic/stp22xx/stp220x.c:
* ic/stp22xx/stp222x-iommu.c:
* ic/stp22xx/stp222x-mdu.c:
* ic/stp22xx/stp222x-stc.c: Silence some unused value warnings.
* libtme/misc.c (_tme_misc_number_parse): Fixed a bug where simple
conversion failure wouldn't return an error.
(tme_misc_cycles_per_ms): Don't sleep while getting the cycle counter
rate, because the cycle counter may run at a different rate when we're
sleeping than when we're running.
* libtme/module.c: Undefine lt_preloaded_symbols, in an attempt to be
forward-compatible with newer libltdls than our libtool knows about.
* libtme/recode-impl.h: Declare tme_recode_regs_src_notify().
* libtme/recode-regs.c (_tme_recode_regs_src_load):
(tme_recode_regs_src_specific): Check that a reserved host register
doesn't have a guest temporary register. After loading a guest
temporary register, forget that it's in the host register.
(tme_recode_regs_src_notify): Added.
* libtme/threads-sjlj.c: Renamed _tme_sjlj_gtk_yield() to
tme_sjlj_threads_gtk_yield().
* libtme/host/x86/rc-x86-insns.c (_tme_recode_x86_insn_rw): Call
tme_recode_regs_src_notify() to notify about a possible temporary
register operand for the address, before calling
tme_recode_regs_host_clean_all().
* libtme/host/x86/rc-x86-rws.c (_tme_recode_x86_rw_tlb_ref): Removed.
(tme_recode_host_rw_thunk_new): Now use the generic support for recode
reads and writes, and the x86 generic TLB support.
* machine/sun/sun-cgsix.c (_tme_suncg6_bus_cycle_alt): Fixed a bug
where we wouldn't complete the cycle.
(tme_sun_cgsix): Added parentheses to silence a paranoid gcc warning
about programmer operator precedence mistakes.
* machine/sun/sun-cgtwo.c: Changed or cast various tme_bus_addr_t to
tme_bus_addr32_t. Now track tokens from TLB entries instead of TLB
entries.
* machine/sun/sun-fb.c (tme_sunfb_bus_cycle_transition) [NDEBUG]:
Catch cycle handlers that don't complete the cycle.
* machine/sun/sun-obie.c (TME_SUN_OBIE_CSR_GET):
(TME_SUN_OBIE_CSR_PUT): Rewritten to avoid a pointer cast, to silence
strict aliasing warnings.
(_tme_sun_obie_tlb_set_allocate): Removed.
(_tme_sun_obie_tlb_set_add): Added.
(_tme_sun_obie_connections_new): Provide _tme_sun_obie_tlb_set_add()
instead of _tme_sun_obie_tlb_set_allocate().
* machine/sun/sun-si.c: Changed or cast various tme_bus_addr_t to
tme_bus_addr32_t. Now track tokens from TLB entries instead of TLB
entries.
(_tme_sun_si_tlb_set_allocate): Removed.
(_tme_sun_si_tlb_set_add): Added.
(_tme_sun_si_connections_new): Provide _tme_sun_si_tlb_set_add()
instead of _tme_sun_si_tlb_set_allocate().
* machine/sun4/SUN4-75: Bumped the default idle-type for more recent
NetBSD.
* machine/sun4/sun44c-memerr.c (_tme_sun44c_memerr_cycle_control):
(_tme_sun44c_memerr_cycle_bus): Changes to remove aliasing.
* machine/sun4u/SUN-ULTRA-1: Bumped the revision of the ledma to 2.
Moved sd0 to id 0.
* tme/memory.h (tme_memory_barrier) [TME_THREADS_COOPERATIVE]: Silence
a possible known-nonzero warning.
* tme/threads.h: Declare tme_sjlj_threads_gtk_yield(), and make a
tme_threads_gtk_yield alias.
* tme/token.h (_tme_token_busy_change) [TME_THREADS_COOPERATIVE &&
defined(TME_NO_DEBUG_LOCKS)]: Silenced a possible known-unzero
warning.
* tme/ic/sparc.h: Define TME_SPARC64_ASI_MASK_USER and
TME_SPARC64_ASI_MASK_PRIV.
Sat Jun 05 14:54:10 2010 Matt Fredette <fredette@alum.mit.edu>
* configure.in: Added a linux x86/mmap recode target. Fixed a bug in
defining TME_HAVE_RECODE.
* bus/multibus/3c400.c (TME_3C400_CSR_GET):
(TME_3C400_CSR_PUT): Rewritten to avoid a pointer cast, to silence
strict aliasing warnings.
* bus/multibus/sun-mie.c (_tme_sun_mie_bus_cycle_regs): Switched to
invalidating tokens from TLB entries.
(_tme_sun_mie_tlb_set_allocate): Removed.
(_tme_sun_mie_tlb_set_add): Added.
(_tme_sun_mie_tlb_fill): Truncate the address to 32 bits. Switched to
tracking tokens from TLB entries.
(_tme_sun_mie_tlb_fill_regs): Truncate the address to 32 bits.
(_tme_sun_mie_connections_new): Provide _tme_sun_mie_tlb_set_add()
instead of _tme_sun_mie_tlb_set_allocate().
* bus/multibus/sun-sc.c: In struct tme_sun_sc, store an actual TLB
entry instead of a pointer to an allocated entry.
(_tme_sun_sc_bus_cycle_dma): Now take a tme_bus_addr32_t instead of a
tme_bus_addr_t.
(_tme_sun_sc_callout): Replaced some tme_bus_addr_t with
tme_bus_addr32_t. Replaced the call to tme_bus_tlb_back() with a
plain structure copy.
(_tme_sun_sc_tlb_fill): Truncate the address to 32 bits.
(_tme_sun_sc_connection_make_bus): Call tme_bus_device_tlb_set_add()
to add the TLB entry to the connection.
* generic/keyboard.c (_tme_keyboard_buffer_out1_bottom):
(_tme_keyboard_buffer_out0): Silence some uninitialized structure
variable warnings.
* host/gtk/gtk-display.c (_tme_gtk_display_callout): Call
tme_threads_gtk_yield(), to make sure that the GTK timeout and idle
callback are set as needed.
* host/posix/posix-disk.c: Define _FILE_OFFSET_BITS to 64 to try to
enable large-file support.
* ic/am7990.c: Replaced various tme_bus_addr_t with tme_bus_addr32_t.
In struct tme_am7990, store actual TLB entries instead of a pointer to
allocated entries.
(_tme_am7990_connection_make_bus): Call tme_bus_device_tlb_set_add()
to add the TLB entries to the connection.
* ic/am9513.c (_tme_am9513_th_timer): Cast what might be a 64-bit
time_t difference to unsigned long, to match the printf format.
* ic/i825x6.c: Replaced various tme_bus_addr_t with tme_bus_addr32_t.
In struct tme_i825x6, store actual TLB entries instead of a pointer to
allocated entries.
(_tme_i825x6_rx_buffers_add): Replaced the call to tme_bus_tlb_back()
with a plain structure copy.
(_tme_i825x6_connection_make_bus): Call tme_bus_device_tlb_set_add()
to add the TLB entries to the connection.
* ic/isil7170.c (_tme_isil7170_th_timer): Cast what might be a 64-bit
time_t difference to unsigned long, to match the printf format.
* ic/lsi64854.c: Replaced various tme_bus_addr_t with
tme_bus_addr32_t. Added support for the ethernet and parallel
channels.
(_tme_lsi64854_bus_cycle_regs): Added some support for 8- and 16-bit
accesses, for the parallel channel.
(_tme_lsi64854_tlb_set_allocate): Removed.
(_tme_lsi64854_tlb_set_add): Added.
* ic/mk48txx.c (_tme_mk48txx_reset): Fixed a bug where we used
TME_MK48TXX_SEC_STOP as a register index.
* ic/stp22xx/stp222x-timer.c (_tme_stp222x_timer_update): Cast what
might be a 64-bit time_t difference to unsigned long, to match the
printf format.
* machine/sun4/sun4-timer.c (_tme_sun4_timer_update): Cast what might
be a 64-bit time_t difference to unsigned long, to match the printf
format.
Sun Mar 07 16:29:27 2010 Matt Fredette <fredette@alum.mit.edu>
* tme/recode.h: Define TME_RECODE_REGINFO_TYPE_TEMPORARY.
Sun Feb 21 15:49:42 2010 Matt Fredette <fredette@alum.mit.edu>
* TODO: Updated.
Sat Feb 20 22:01:40 2010 Matt Fredette <fredette@alum.mit.edu>
* ic/sparc/sparc-execute.c: After the last replay instruction, make
sure that the replay current instruction tlb token isn't the invalid
token.
* ic/sparc/sparc-impl.h: Removed an old comment.
* ic/sparc/sparc-rc-insns.c: Commented the TME_SPARC_RECODE_INSN_
values.
* ic/sparc/sparc-recode.c (tme_sparc_recode_invalidate_all): Fixed a
bug where we wouldn't clear the return address stack after
invalidating all instructions thunks.
(tme_sparc_recode): When we can't recode, instead of calling only
_tme_sparc_recode_src_hash_invalidate(), call
tme_sparc_recode_invalidate_all() to do everything needed when all
instructions thunks are invalidated.
* ic/sparc/sparc-vis-auto.sh (tme_sparc${arch}_vis_ls_asi_pst): Fixed
a bug where we wouldn't unbusy the TLB entry before trapping for an
illegal instruction. Any ASI handler that traps directly on its own,
must do this.
* tme/recode.h: Removed the unused tme_recode_reginfo_type macro.
Sat Feb 20 18:35:47 2010 Matt Fredette <fredette@alum.mit.edu>
* ic/sparc/sparc-insns-auto.sh (tme_sparc64_casa):
(tme_sparc64_casxa): Fixed a bug where we would use
TME_SPARC_FORMAT3_RS2, even if the i bit is set, instead of always
decoding rs2 like tme_sparc64_atomic() does.
* ic/sparc/sparc-misc.c (tme_sparc64_trap): Removed some old debugging
code.
Thu Feb 18 02:01:33 2010 Matt Fredette <fredette@alum.mit.edu>
* TODO: Updated.
* ic/sparc/sparc-misc.c (tme_sparc_nnpc_trap): Make a more complete
dummy load/store structure.
* tme/common.h: Fixed old bugs where tme_value64_uint32_lo and
tme_value64_uint32_hi were defined to be signed.
Define tme_value64_cmp().
Mon Feb 15 22:23:15 2010 Matt Fredette <fredette@alum.mit.edu>
* libtme/recode-regs.c (tme_recode_regs_host_clean_all): Now that a
host register can be clean at any size, instead of freeing a host
register that was dirty not at the full guest register size, just mark
it as clean.
(_tme_recode_regs_src_load): As an optimization, if the read-uses
count for the guest register is only one, only load the size that this
instruction needs.
(tme_recode_regs_dst_any):
(tme_recode_regs_dst_specific): Replaced
TME_RECODE_REGINFO_TAGS_DIRTY_SIZE() with
TME_RECODE_REGINFO_TAGS_VALID_SIZE().
* libtme/host/x86/rc-x86-chain.c (_tme_recode_x86_chain_subs): Use
TME_RECODE_REGINFO_TAGS_VALID_SIZE() and TME_RECODE_REGINFO_TAGS_CLEAN
in the fake register information for loading the guest PC.
* libtme/host/x86/rc-x86-flags.c (tme_recode_host_flags_thunk_add):
Use TME_RECODE_REGINFO_TAGS_VALID_SIZE() in the fake register
information for the subs operands.
* libtme/host/x86/rc-x86-regs.c (tme_recode_host_reg_move): For both
loading and storing, get the size to move using
TME_RECODE_REGINFO_TAGS_WHICH_VALID_SIZE().
(tme_recode_host_reg_imm): As an optimization, only make as big an
immediate as the instruction needs.
* machine/sun/sun-mmu.c: Define TME_SUN_MMU_CONTEXT_TLBS. In struct
tme_sun_mmu_tlb_set, replaced the TLB set information with a struct
tme_bus_tlb_set_info.
In struct tme_sun_mmu, track a set of TLBs that must be invalidated
when the context changes.
Changed from tracking pointers to TLB entries to tracking pointers to
their tokens.
(tme_sun_mmu_tlbs_invalidate): Use tme_bus_tlb_set_invalidate() to
invalidate a TLB set.
(tme_sun_mmu_tlbs_context_set):
(tme_sun_mmu_tlb_set_allocate): Removed.
(tme_sun_mmu_context_add):
(tme_sun_mmu_context_switched):
(tme_sun_mmu_tlb_set_add): Added.
* tme/recode.h: Replaced TME_RECODE_REGINFO_TAGS_DIRTY_SIZE_MASK,
which was nonzero iff the host register was dirty, with
TME_RECODE_REGINFO_TAGS_VALID_SIZE_MASK, which is nonzero iff the tags
are valid.
Changed the value of TME_RECODE_REGINFO_TAGS_CLEAN to be right before
TME_RECODE_REGINFO_TAGS_VALID_SIZE_MASK, to enable the changed
TME_RECODE_REGINFO_TAGS_WHICH_DIRTY_SIZE(). Renamed
TME_RECODE_REGINFO_TAGS_VALID_SIZE() to
TME_RECODE_REGINFO_TAGS_ARE_VALID_SIZE(), all callers changed. Added
TME_RECODE_REGINFO_TAGS_WHICH_VALID_SIZE(). Changed
TME_RECODE_REGINFO_TAGS_WHICH_DIRTY_SIZE() and
TME_RECODE_REGINFO_TAGS_ARE_DIRTY() to use the new
TME_RECODE_REGINFO_TAGS_VALID_SIZE_MASK and
TME_RECODE_REGINFO_TAGS_CLEAN. Added the new
TME_RECODE_REGINFO_TAGS_VALID_SIZE().
Mon Feb 15 16:57:13 2010 Matt Fredette <fredette@alum.mit.edu>
* ic/stp22xx/stp222x-mdu.c (tme_stp222x_mdu_regs_clear): Added a
performance hack to dispatch any waiting interrupt to the CPU clearing
an interrupt's pending state.
* libtme/memory-auto.sh (_tme_memory_write): Added an explicit cast to
type_part, to silence compiler warnings when we're writing a constant
wider than type_part.
(tme_memory_bus_${op}_buffer): Fixed some ${op_const} to
${op_const_mem}, to silence lost-qualifier warnings.
(tme_memory_atomic_${op}${size}): When threads are cooperative, do the
read or write using the plain macro.
* libtme/recode-rws.c (tme_recode_rw_thunk): Many address type values
that used to be plain in the read/write structure moved to an address
type structure. Use tme_recode_address_type_check() to check the
read/write address type, and tme_recode_address_type_compare() to
compare it to an existing thunk's address type.
* libtme/threads-sjlj.c: Removed TME_SJLJ_DISPATCHER_FALSE and
TME_SJLJ_DISPATCHER_TRUE, since the thread dispatcher no longer
returns any value. In struct tme_sjlj_thread, added the last dispatch
number for a thread, and under HAVE_GTK, no longer track timeout
handles. Removed tme_sjlj_thread_dispatched_timeout. Define globals
for the global dispatch number, the reasonably current time, and the
short thread flag. Under HAVE_GTK, define globals for the timeout
source ID and the current timeout time.
(tme_sjlj_gettimeofday): Added.
(_tme_sjlj_change_state): Add a not-blocked thread next on the
dispatching list if threads are being dispatched, and this thread
wasn't already in this dispatch.
(_tme_sjlj_threads_dispatching_runnable):
(_tme_sjlj_threads_dispatching_timeout):
(_tme_sjlj_timeout_time): Added.
(tme_sjlj_dispatch_fd): Removed.
(_tme_sjlj_threads_dispatching_fd): Added to replace
tme_sjlj_dispatch_fd().
(tme_sjlj_dispatch): Return no value, and don't expect
tme_sjlj_yield() to return any value via longjmp(). Before
dispatching a thread, remove it from the timeout list if needed, and
set its dispatch number. After a dispatch, increment the global
dispatch number.
(_tme_sjlj_gtk_callback_timeout):
(_tme_sjlj_gtk_callback_fd):
(_tme_sjlj_gtk_callback_idle):
(_tme_sjlj_gtk_yield): Added.
(tme_sjlj_threads_run): If we're using the GTK main loop, do an
initial _tme_sjlj_gtk_yield() instead of adding an idle directly. In
our main loop, removed the code that sorted the timeout list, now that
tme_sjlj_yield() inserts a thread at the right place on the list. Use
_tme_sjlj_timeout_time() to get the timeout time. After the select(),
use _tme_sjlj_threads_dispatching_runnable(),
_tme_sjlj_threads_dispatching_timeout() and
_tme_sjlj_threads_dispatching_fd() to build the dispatching list, and
tme_sjlj_dispatch() to dispatch them all.
(tme_sjlj_thread_create): Initialize the thread's dispatch number.
(tme_sjlj_cond_notify): Always call _tme_sjlj_change_state with
TME_SJLJ_THREAD_STATE_RUNNING (only the dispatch functions can use
TME_SJLJ_THREAD_STATE_DISPATCHING).
(tme_sjlj_yield): Don't return any value through longjmp(). Under
HAVE_GTK, don't do any GTK timeout allocation. Insert a thread with a
timeout at the right spot on the timeout list.
(tme_sjlj_sleep): Use tme_thread_long() to mark long runs, and
tme_gettimeofday() to get the current time. Fixed a bug where the
first timeout would be undefined.
(tme_sjlj_select_yield): Use tme_thread_long() to mark a long run.
* libtme/host/x86/rc-x86-insns.c (_tme_recode_x86_insn_guest): Added
support for TME_RECODE_OPERAND_UNDEF source operands. Fixed a bug in
the x86-64 double-host-size where we would load the first source
operand for the second.
* libtme/host/x86/rc-x86-rws.c (tme_recode_host_rw_thunk_new): Get
parameters from the new address type structure in the read/write
structure, instead of directly from the read/write structure or the ic
structure.
Mon Feb 15 14:58:58 2010 Matt Fredette <fredette@alum.mit.edu>
* acinclude.m4: Quote all of the AC_DEFUN macro names.
* configure.in: When long is 64 bits, check for the maximum shift of a
64-bit value, whether or not right shifts of signed 64-bit values are
arithmetic, and for bswap64().
Updated to the AM_PATH_GTK_2_0() macro. When long is 64 bits or the
compiler is gcc, add sunultra1 to the systems list.
Define bus_size_max and recode_size_guest_max from values from each
system to build.
Added sunultra1.
Added some missing $srcdir to paths. Added the --enable-recode
option, and configure recode support. Configure miscellaneous target
support. Generate tme/recode-host.h, libtme/recode-host.c, and
libtme/misc-host.c. Added more Makefiles to the AC_OUTPUT().
Sun Feb 14 20:17:12 2010 Matt Fredette <fredette@alum.mit.edu>
* ic/sparc/sparc-execute.c:
* ic/sparc/sparc-rc-ls.c: Switched from the old TME_RECODE_RW_FLAG and
TME_SPARC_RECODE_RW_FLAG_ names to the new TME_RECODE_TLB_FLAG and
TME_SPARC_RECODE_TLB_FLAG_ names.
* ic/sparc/sparc-fpu.c [TME_HAVE_INT64_T]: Include sparc-vis-auto.c.
(tme_sparc_fpu_exception_check): Use the per-architecture fp_exception
trap.
(tme_sparc32_stdfq): Use TME_SPARC_INSN_FPU_ENABLED() instead of
TME_SPARC_INSN_FPU_STORE(), which might mem_address_not_aligned trap
before the fp_exception, which is the wrong order on a v9 CPU. This
function needs to be corrected for any CPU that actually implements
the FQ.
(tme_sparc_fpu_fpreg_aligned): Removed.
(tme_sparc_fpu_fpreg_decode): Added, as a replacement for
tme_sparc_fpu_fpreg_aligned().
(tme_sparc_fpu_fpreg_format): Our caller is now expected to make sure
the register is aligned.
(tme_sparc_fpu_fpreg_read): Don't use TME_FIELD_MASK_EXTRACTU with a
variable mask. Use tme_sparc_fpu_fpreg_decode() to decode the
register number.
* ic/sparc/sparc-impl.h: Switched from the old TME_RECODE_RW_FLAG()
and TME_SPARC_RECODE_RW_FLAG_ names to the new TME_RECODE_TLB_FLAG()
and TME_SPARC_RECODE_TLB_FLAG_ names.
* ic/sparc/sparc-misc.c:
* ic/sparc/sparc-rc-verify.c: Switched from the old
tme_sparc_dtlb_recode_tlb names to the new tme_sparc_recode_tlb names.
* ic/sparc/sparc-rc-ls.c (tme_sparc_recode_ls_tlb_update): The DTLB
array is really a single TLB array with the ITLB entries. The recode
TLB entries' read/write flags were renamed to just (TLB) flags.
(_tme_sparc_recode_ls_init): Set the members of the new address type
structure in the read/write structure. Many of them used to be plain
in the read/write structure.
Sun Feb 14 18:08:02 2010 Matt Fredette <fredette@alum.mit.edu>
* ic/sparc/cy7c601.c (tme_ic_,sparc,cy7c601): Call
tme_sparc_sync_init() and set the tme_sparc_timing_loop_cycles_each
value.
* ic/sparc/mb86900.c (tme_ic_,sparc,mb86900): Call
tme_sparc_sync_init() and set the tme_sparc_timing_loop_cycles_each
value.
* ic/sparc/sparc-execute.c: Set the recode chain TLB flags mask.
Manage a pointer to the token for current instruction TLB entry,
instead of the current instruction TLB entry itself, because that's
what the recode instruction thunks do. On a branch to ., truncate the
instruction burst to get to the code that handles a branch to . as a
timing loop or an idle. At the end of an instruction burst, possibly
update the instruction burst runlength, and if the next instruction
will be annulled, loop to handle it now. Clear the instruction burst
other flag if this will be a normal burst, otherwise set it for an
idle burst. When updating PC_next_next on a v9 CPU, mask it with the
address mask.
[TME_SPARC_HAVE_RECODE()]: Removed the source key offset.
tme_recode_insns_thunk_run() now takes a chain thunk. When recode
thunks return, switch to the invalid instruction TLB entry.
* ic/sparc/sparc-impl.h: Include <tme/runlength.h>.
Define TME_SPARC64_TICK_NPT and TME_SPARC64_TICK_COUNTER. Added
support for the sunos64-type-0 idle type.
(TME_SPARC_IDLE_MARK): Flag the instruction burst as shortened.
Define TME_SPARC_MODE_TIMING_LOOP.
[!TME_HAVE_RECODE]: Removed old arguments from
_TME_SPARC_RECODE_CWP_UPDATE.
Define different versions of TME_SPARC_HAVE_RECODE() that avoid using
TME_SPARC_VERSION(ic) whenever possible. Define
TME_SPARC_RECODE_TLB_FLAG_CHAIN_USER() and
TME_SPARC_RECODE_TLB_FLAG_CHAIN_PRIV(). Define the
TME_SPARC_EXTERNAL_CHECK_ macros. Define tme_sparc_ireg_umax_t.
In struct tme_sparc, added the number of scaled cycles per
microsecond, the runlength state and its update state, get the
instruciton burst from the runlength state, track the token of any
currently busy instruction TLB entry, added the address mask, added
the timing information, the current chain TLB flags, the chain return
address stack, removed the chain cacheable and source key offset,
added the instructions group structure. Declare
tme_sparc_sync_init(), tme_sparc_itlb_current(),
tme_sparc_insn_peek(), the timing support functions, the chain TLB
update functions, and tme_sparc_recode_verify_end_preinstruction().
Now define the verify no-operation macros even if TME_HAVE_RECODE is
zero.
* ic/sparc/sparc-insns-auto.sh: Instead of testing for PSTATE.AM,
always mask sparc64 addresses with ic->tme_sparc_address_mask.
(tme_sparc${arch}_${slow}): Set ic->_tme_sparc_instruction_burst_other
to flag the shortened burst.
(tme_sparc${arch}_ls): Even when the ASI has not been specified, the
instruction may provide ASI flags, so add them in. Call
tme_sparc${arch}_recode_chain_tlb_update() to update a recode
instruction TLB entry.
Don't assert that the mapping made a mapping until after checking
whether or not it completed the transfer.
* ic/sparc/sparc-insns.c (tme_sparc32_wrpsr): Set
ic->_tme_sparc_instruction_burst_other to flag the shortened
instruction burst.
(tme_sparc64_return):
(tme_sparc64_done_retry): Instead of testing for PSTATE.AM, always
mask sparc64 addresses with ic->tme_sparc_address_mask.
(tme_sparc64_rdpr):
(tme_sparc64_rdasr): Mask the scaled cycles counter to fit in
TICK.COUNTER, and or in TICK.NPT if needed.
(_tme_sparc64_idle_type_sunos64_type_0_splhigh): Added.
(tme_sparc64_wrpr): Handle TICK.NPT and the TICK.COUNTER offset
separately.
Fixed a bug where we wouldn't redispatch after a write to PSTATE. To
improve interrupt latency, do an interrupt check before raising PIL,
and after lowering it.
Added support for detecting the sunos64-type-0 idle type.
* ic/sparc/sparc-misc.c: Replaced uses of the _tme_sparc_itlb_busy
member with either _tme_sparc_itlb_current_token and the token
functions, or a call to tme_sparc_itlb_current().
(tme_sparc_idle): Call the external check function with
TME_SPARC_EXTERNAL_CHECK_MUTEX_LOCKED.
(tme_sparc_thread): When entering execution mode, if this instruction
burst will be used to update the runlength, note its start time.
Added support for the timing loop mode.
(_tme_sparc_command): Added the sunos64-type-0 idle type.
(tme_sparc_sync_init): Added.
(tme_sparc_new): For the timing loop code, initialize
ic->tme_sparc_cycles_unscaling. Initialize the instruction burst
runlength state.
(tme_sparc_do_idle): Set ic->_tme_sparc_instruction_burst_other to
flag the shortened instruction burst.
(tme_sparc32_external_check): Now take flags instead of a boolean.
(tme_sparc64_trap): Reset TICK.NPT and TICK.counter separately. Also
reset TICK.counter on an XIR.
(tme_sparc_itlb_current):
(tme_sparc_insn_peek): Added.
(tme_sparc_fetch_nearby): Call tme_sparc_insn_peek() to do the peek.
(tme_sparc_callout_relock): If we need to do an external check,
shorten the current instruction burst to do one immediately.
* ic/sparc/sparc-rc-chain.c: Removed some accidentally committed
AUDITs.
* ic/sparc/sparc-rc-insns.c: Replaced the TME_SPARC_RECODE_INSN_JUMP_
macros with TME_SPARC_RECODE_CHAIN_INFO() used with the
TME_RECODE_CHAIN_INFO_ macros.
(tme_sparc_recode_insn_assist_redispatch): Use
_tme_sparc_recode_chain_src_key() to check if the current PC is still
cache-valid.
(_tme_sparc_recode_insn_assist_jmpl): Added.
(_tme_sparc_recode_recode): Added support for PSTATE.AM, mostly by
doing PC calculations in that address size. Be sure to not recode the
last instruction before tme_sparc_ireg_t wraps to zero.
Fixed jmpl recoding to call the assist function to check for traps, to
try to characterize a jmpl as a call or a return, and to better write
the PC of the jmpl into any destination register. Mark each chain
jump as either near or far. When recoding a call instruction, if the
PC is not the guest size, zero-extend r[15] after the PC has been
copied into it. Also use r[15] as the source for advancing PC to the
branch delay slot, for better host register allocation. Mark each
chain call as either near or far.
When an instruction needs a full assist, the source operands aren't
used, so make them the recode %undef. If there is no chain
information at the end of an instructions group, make unconditional
jump information. If the chain information is conditional, mark the
alternate as either near or far. Store the end of the instructions
and the chain information in the instructions group.
* ic/sparc/sparc-rc-verify.c: Removed
_tme_sparc_recode_verify_ic_replay_token.
(_tme_sparc_recode_verify_change): Renamed the read/write flags to
just TLB flags.
(tme_sparc_recode_verify_begin): Use tme_sparc_itlb_current() to get
the current TLB entry. Preserve the token pointer when initializing
the current TLB entry in the replay state. Fix
_tme_sparc_itlb_current_token in the saved in state. Force the
instruction burst size to two in the in state.
(tme_sparc_recode_verify_end): Use tme_sparc_itlb_current() to get the
current TLB entry. Set _tme_sparc_itlb_current_token instead of
_tme_sparc_itlb_busy.
(tme_sparc_recode_insns_dump): Check _tme_sparc_itlb_current_token
instead of _tme_sparc_itlb_busy. Call
_tme_sparc_recode_chain_src_key() to get the source key.
(_tme_sparc_recode_verify_init): Initialize and set tokens on all
replay TLB entries.
* ic/sparc/sparc-recode.c: Define TME_SPARC_RECODE_SRC_KEY_UNDEF,
TME_SPARC64_RECODE_SRC_KEY_FLAG_AM and
TME_SPARC64_RECODE_SRC_KEY_FLAG_CLE. Include sparc-rc-chain.c for
each architecture.
(_tme_sparc_recode_src_hash_invalidate): Use
TME_SPARC_RECODE_SRC_KEY_UNDEF for an invalidated source key. If an
invalidated source key has an instructions thunk, invalidate it, to
make sure that no other instruction thunk can chain to it.
(_tme_sparc_recode_jump_chain): Removed.
(tme_sparc_recode): Set the instructions group host source address.
On a v9 CPU, add PSTATE.AM and PSTATE.CLE to the source address key.
Set the instructions group valid byte and mask. Check for
TME_SPARC_RECODE_SRC_KEY_UNDEF for an invalidated source key, since
valid source keys may now be nonzero mod sizeof(tme_uint32_t).
(tme_sparc_recode_dump_insns): Don't take the recode instructions
array, since it can be found in the struct tme_sparc recode
instructions group. Replaced the TME_RECODE_OPCODE_JUMP dump with a
TME_RECODE_CHAIN_INFO_ dump. Added support for
TME_RECODE_OPERAND_UNDEF.
(tme_sparc_recode_init): Removed address translation and jump chain
member initialization. These are now given in address type structures
by _tme_sparc_recode_ls_init() and _tme_sparc_recode_chain_init().
Set the first instruction in the instructions group. Call the
_tme_sparc_recode_chain_init() for this architecture.
* ic/sparc/sparc-timing.c: Replaced uses of the _tme_sparc_itlb_busy
member with _tme_sparc_itlb_current_token and the token functions.
(tme_sparc_timing_loop_finish): Flag the shortened instruction burst.
* ic/sparc/stp103x.c: Define TME_STP103X_TCR_INT_DIS and
TME_STP103X_TCR_TICK_CMPR. In struct tme_stp103x, added the tick
compare condition and time.
(tme_misc_timeval_never): Added, although this should be moved.
(_tme_stp103x_interrupt_check): Take a mask of flags, instead of a
boolean. All callers changed. Added support for
TME_SPARC_EXTERNAL_CHECK_PCS_UPDATED.
(_tme_stp103x_update_sir): Now take and-not and or masks for SIR. All
callers changed.
Before clearing SIR.TICK_INT, to help TICK interrupt latency, do an
interrupt check, backing up the PCs to the previous instruction if a
tick interrupt should have been delivered.
(_tme_stp103x_update_pstate): Make sure %g0 is zero in both the normal
global register set and the current global register set. When there
is recode support, if PSTATE.AM and/or PSTATE.CLE are changing, clear
the return address stack. Update the address mask according to
PSTATE.AM, and mask the new PCs with it.
(_tme_stp103x_rdpr): Use tme_sparc_itlb_current() instead of
ic->_tme_sparc_itlb_busy. Don't use return() with a void value.
(_tme_stp103x_wrasr): Update the tick compare thread on a write to
TCR.
(_tme_stp103x_flush): Always mask the address. Since the default ASI
may not be the unrestricted ASI, and the nucleus ASI can't be modified
with ASI flags, instead of giving an explicit ASI, specify the
no-fault ASI flag in the load/store information.
(_tme_stp103x_ls_trap): Added support for TME_SPARC_LSINFO_NO_FAULT.
(_tme_stp103x_ls_address_map): If _tme_stp103x_ls_trap() ever returns,
check for TME_SPARC_LSINFO_NO_FAULT and return, instead of aborting.
(_tme_stp103x_tick_compare_th): Added.
(_tme_stp103x_external_check): Take a mask of flags, instead of a
boolean. All callers changed.
(_tme_stp103x_interrupt): Added a missed wakeup on the external
condition.
(_tme_stp103x_new): Call tme_sparc_sync_init(). Initialize the tick
compare thread state, and start the tick compare thread. Initialize
ic->tme_sparc_timing_loop_cycles_each.
Sun Feb 14 00:48:04 2010 Matt Fredette <fredette@alum.mit.edu>
* ic/sparc/sparc-misc-auto.sh: Renamed tme_sparc64_ireg_tick to
tme_sparc64_ireg_tick_offset, and added the separate
tme_sparc64_ireg_tick_npt.
* serial/ms-mssystems.c (_tme_serial_ms_mssystems5_init): Set the
rate-limiting based on the baud rate and the packet size.
* serial/serial-ms.c: _tme_serial_ms_callout): Added support for
rate-limiting reading events.
(_tme_serial_ms_th_rate): Added.
(tme_serial_,kb,mouse): Start the rate-limiting thread.
* serial/serial-ms.h: In struct tme_serial_ms, added members for
rate-limiting serial data.
Thu Feb 11 00:15:55 2010 Matt Fredette <fredette@alum.mit.edu>
* tme/recode.h: Define TME_RECODE_OPERAND_UNDEF.
Wed Feb 10 00:34:26 2010 Matt Fredette <fredette@alum.mit.edu>
* libtme/host/x86/rc-x86-regs.c (tme_recode_host_reg_imm): When the
most significant half of a double-host-size immediate is zero, emit an
xorl to clear the second register, instead of a mov of zero.
Tue Feb 09 01:27:56 2010 Matt Fredette <fredette@alum.mit.edu>
* libtme/recode-regs.c (tme_recode_regs_host_reserve): Assert that
there is a reservation array entry free.
(_tme_recode_regs_src_load): Fixed a bug where we didn't handle the
case where the host register was already reserved, and would instead
decrement the reserved read-uses count.
Sun Feb 07 17:32:01 2010 Matt Fredette <fredette@alum.mit.edu>
* libtme/recode-impl.h: Define struct tme_recode_tlb_type.
tme_recode_host_insns_thunk_new() now takes an instructions group,
instead of pointers to the array of instructions. Declare
tme_recode_address_type_check(), tme_recode_address_type_compare(),
and tme_recode_address_type_tlb_type().
* libtme/recode-insns.c (tme_recode_insns_thunk): Now take a
instructions group structure, instead of pointers to the instructions
array. All callers changed. Removed the TME_RECODE_OPCODE_JUMP
support.
* libtme/host/x86/rc-x86-insns.c (_tme_recode_x86_insn_jump):
(tme_recode_insn_jump_chain): Removed.
(_tme_recode_x86_insn_emit): When emitting an extension instruction,
fixed a performance bug where we would load the source operand at the
destination size, instead of at the extension's source operand size.
Removed the TME_RECODE_OPCODE_JUMP support.
(tme_recode_insns_thunk_invalidate): Added.
(tme_recode_host_insns_thunk_new): Call _tme_recode_x86_chain_in() and
_tme_recode_x86_chain_out() to emit the chain in and chain out
instructions, instead of emitting a jump to the instructions prologue.
Get the instructions array from the instructions group structure.
* libtme/host/x86/recode-x86.c: Define TME_RECODE_X86_OPCODE_PUSH_Ib
and TME_RECODE_X86_OPCODE_BINOP_Iz_A. Define
TME_RECODE_X86_EA_BASE_IP. Remove
TME_RECODE_X86_OFFSET_JUMP_CHAIN_DIRECT.
(_tme_recode_x86_emit_jmp):
(_tme_recode_x86_fixup_jmp): Added.
(tme_recode_host_ic_new): Removed the code that emitted the
instructions thunk prologue, epilogue, jump subs and jump chain subs.
Call _tme_recode_x86_chain_epilogue() to make the instructions thunk
epilogue.
* tme/Makefile.am: Added runlength.h to pkginclude_HEADERS.
* tme/recode.h: Removed TME_RECODE_OPCODE_JUMP. Replaced the
TME_RECODE_JUMP_ macros with the TME_RECODE_CHAIN_INFO_ macros.
(TME_RECODE_INSNS_THUNK_INSNS_MAX): Account for
TME_RECODE_HOST_INSN_THUNK_OVERHEAD. In the TLB entry structures,
renamed all of the read/write flags to just (TLB) flags.
Define struct tme_recode_address_type. In struct tme_recode_rw,
replaced the address type members with an address type structure.
Define struct tme_recode_chain_thunk. Define struct
tme_recode_insns_group. In struct tme_recode_ic, removed the members
that are now included in the address type structure in a struct
tme_recode_rw. Replaced the tme_recode_ic_jump_chain member with the
tme_recode_ic_chain_fixup member. Renamed tme_recode_ic_jump_counter
to tme_recode_ic_chain_counter_offset. Added members for the chain
return address stack and the current instruction TLB entry token
offset. Declare tme_recode_chain_ras_clear(),
tme_recode_chain_thunk(), tme_recode_chain_fixup(), and
tme_recode_insns_thunk_invalidate(). tme_recode_insns_thunk() now
takes an instructions group, instead of pointers to the array of
instructions.
[TME_RECODE_DEBUG]: Declare tme_recode_chain_thunk_dump().
* tme/threads.h: Declare tme_sjlj_gettimeofday(), and alias
tme_gettimeofday to it. Declare tme_sjlj_thread_short. Define
tme_thread_long().
* tme/host/recode-x86.h: Define TME_RECODE_X86_CHAIN_IN_SIZE_MAX and
TME_RECODE_X86_CHAIN_OUT_SIZE_MAX, and use them to define
TME_RECODE_HOST_INSN_THUNK_OVERHEAD. Define
TME_RECODE_HOST_CHAIN_THUNK. In TME_RECODE_X86_IC, renamed
tme_recode_x86_ic_insns_prologue to tme_recode_x86_ic_chain_epilogue.
Removed tme_recode_x86_ic_insns_epilogue, tme_recode_x86_ic_subs_jump,
and tme_recode_x86_ic_subs_jump_chain. Added
tme_recode_x86_ic_chain_fixup_target.
(tme_recode_insns_thunk_run): Now takes a chain thunk instead of the
recode IC, all callers changed. Renamed the TME_RECODE_RW_FLAG macros
to TME_RECODE_TLB_FLAG macros. Define the tme_recode_ras_entry_t
type.
Sun Feb 07 16:51:53 2010 Matt Fredette <fredette@alum.mit.edu>
* generic/mouse.c (_tme_mouse_deltas_opposite): Added.
(tme_mouse_buffer_copyin): If the new event can be merged with the
previous new event, merge them.
* libtme/Makefile.am: Added SUBDIRS.
In libtme_la_SOURCES, replaced misc.c with misc-host.c, and added the
machine independent recode sources and token.c and runlength.c.
Added misc.c to EXTRA_DIST.
* libtme/kgdb.c libtme/recode-address.c libtme/runlength.c
tme/runlength.h tools/stp103x-tlbs.pl tools/sun4u_58-find-module.pl
tools/tme-log-binary-dump-calls-traps.pl
tools/tme-toolchain-wrapper.pl:
Added.
* libtme/recode-ic.c (tme_recode_opcode_dump): Removed
TME_RECODE_OPCODE_JUMP.
* libtme/host/x86/Makefile.am: Added rc-x86-tlb.c and rc-x86-chain.c
to EXTRA_DIST.
* libtme/host/x86/rc-x86-chain.c: Fixed many bugs where
TME_RECODE_X86_MOD_RM_EA_DISP32() was used with
TME_RECODE_X86_EA_BASE_IP.
Split TME_RECODE_X86_CHAIN_RETURN_ADDRESS() into separate definitions
for ia32 and x86-64 hosts, because the ia32 expression gets a pointer
cast size warning on x86-64.
(_tme_recode_x86_chain_in): Explicitly cast a value being stored into
a tme_uint8_t, to tme_uint8_t, to avoid a warning when this value is a
16-bit constant. Fixed a bug where we added two rex prefixes
together.
(_tme_recode_x86_chain_prologue): Fixed an assert.
Fri Feb 05 01:06:01 2010 Matt Fredette <fredette@alum.mit.edu>
* ic/sparc/Makefile.am: Added sparc-rc-chain.c to EXTRA_DIST.
* ic/sparc/sparc-rc-chain.c: Added.
Fri Jan 15 03:05:59 2010 Matt Fredette <fredette@alum.mit.edu>
* libtme/host/x86/rc-x86-chain.c:
* libtme/host/x86/rc-x86-tlb.c: Added.
Sun Nov 08 17:35:49 2009 Matt Fredette <fredette@alum.mit.edu>
* host/posix/posix-disk.c (_tme_posix_disk_buffer_free):
(_tme_posix_disk_open):
(_tme_posix_disk_close):
(__tme_posix_disk_command):
(_tme_posix_disk_command): Added.
(_tme_posix_disk_buffer_get): Now use _tme_posix_disk_buffer_free() to
free a buffer.
(tme_host_posix,disk): Now use _tme_posix_disk_open() to open the disk
image and set our command function on the element.
* ic/stp2024.c: Corrected all of the audio codec and DMA register
offsets.
* ic/sparc/Makefile.am: Added sparc-timing.c to
tme_ic_sparc_la_SOURCES.
* ic/sparc/sparc-fpu-auto.sh: Fixed a bug where FsMULd was doing a
single-precision multiply.
* ic/sparc/sparc-rc-ls.c (_tme_sparc_recode_ls_assist_check): On a v9
CPU, mask the addresses.
* ic/sparc/sparc-rc-verify.c (tme_sparc_recode_verify_end_preinstruction):
Added.
(tme_sparc_recode_verify_end): Added support for
TME_SPARC_RECODE_VERIFY_PC_NONE.
(tme_sparc_recode_insns_dump): Fixed the suggested prints for the case
where TME_SPARC_RECODE_SRC_HASH_SIZE_ELEMENT is not one.
* ic/sparc/sparc-timing.c (_tme_sparc_timing_loop_start): Corrected
the comment about the state of the PCs.
(tme_sparc_timing_loop_assist): Now call
tme_sparc_recode_verify_end_preinstruction().
* ic/sparc/sparc-vis-auto.sh: Added support for the
FCMP{GT,LE,NE,EQ}{16,32} instructions.
* ic/stp22xx/stp220x.c (_tme_stp220x_ebus_cycle): Fixed a bug where we
wouldn't update the read/write bits in the control register.
* ic/stp22xx/stp222x-impl.h: Added tme_stp2220_mdu_idi_zs0_zs1_active
to struct tme_stp222x.
* ic/stp22xx/stp222x-mdu.c (tme_stp222x_mdu_intcon): Now mimic how the
zs0 and zs1 interrupt signals are wired together somewhere.
* ic/stp22xx/stp222x-stc.c (tme_stp222x_stc_flush): The stp2220 flush
writeback actually only writes back four bytes, not eight.
(tme_stp222x_stc_regs_diag): Added minimal emulation of reads of the
diagnostic registers, always returning zero.
* libtme/misc.c (tme_misc_cycles_scaled): Now take an optional pointer
to an unscaled cycles counter, and do the scaling as a simple
floating-point multiply. Added support for hosts that don't have a
64-bit integral type.
(tme_misc_cycles_scaling): Now make the scaling with a simple
floating-point division.
[!TME_HAVE_MISC_CYCLES_PER_MS] (tme_misc_cycles_per_ms): Added support
for hosts that don't have a 64-bit integral type.
[!TME_HAVE_MISC_CYCLES] (tme_misc_cycles): Added support for hosts
that don't have a 64-bit integral type.
(tme_misc_cycles_spin_until):
(tme_value64_add):
(tme_value64_sub): Added.
* libtme/threads-sjlj.c (tme_sjlj_dispatch): Fixed a bug where we
would call gtk_idle_add_priority() when we weren't using GTK.
* libtme/host/x86/misc-x86.c: Define tme_misc_cycles() with inline.
* machine/sun/sun-bwtwo.c (_tme_sunbw2_type_set): Now define the
interrupt bus signal.
* machine/sun/sun-cgsix.c (_tme_suncg6_type_set): Now define the
interrupt bus signal.
* machine/sun/sun-fb.c: Now define TME_SUNFB_UPDATE_SIZE. Changed
various tme_bus_addr_t to tme_bus_addr32_t.