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I am exploring, hacking and evaluation a extremely modular possibly minimalistic but high end and modular novel approach for a new SPM control topology based on the Gxsm "GVP engine or core " invention.
Gxsm4 recently received two renovated but experimental HwI plugins, a bare simulator and code template "spm-template" HwI and a right now in the works "RPSPMC" (=Red Pitaya SPM Control) HwI.
Minimally 4 (up to 6) channels of additional PPM precision (20bit) DACs can hard wired and feed via SPI from the FPGA in parallel allowing up to 1 MSPS throughput. Hardware is currently all off the shelf only required minimal hookup via a short custom ribbon cable connection to individual modules.
Additional AD (to the two RP channels at 14bit) are under investigation but optional.
Auxiliary GPIO for instrument controls is thought to be added via IO-Expanders and I2C on Zynq level.
Stay tuned or better tune in to the discussion with more Ideas!
The Gxsm team and project admin. Hacking "Hard"....
-P
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Stay tuned here:
I am exploring, hacking and evaluation a extremely modular possibly minimalistic but high end and modular novel approach for a new SPM control topology based on the Gxsm "GVP engine or core " invention.
Gxsm4 recently received two renovated but experimental HwI plugins, a bare simulator and code template "spm-template" HwI and a right now in the works "RPSPMC" (=Red Pitaya SPM Control) HwI.
Minimally 4 (up to 6) channels of additional PPM precision (20bit) DACs can hard wired and feed via SPI from the FPGA in parallel allowing up to 1 MSPS throughput. Hardware is currently all off the shelf only required minimal hookup via a short custom ribbon cable connection to individual modules.
Additional AD (to the two RP channels at 14bit) are under investigation but optional.
Auxiliary GPIO for instrument controls is thought to be added via IO-Expanders and I2C on Zynq level.
Stay tuned or better tune in to the discussion with more Ideas!
The Gxsm team and project admin. Hacking "Hard"....
-P
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