Pinned Loading

1. 2D-Systolic-Array-Multiplier 2D-Systolic-Array-Multiplier Public

   2D Systolic Array Multiplier

   SystemVerilog 8

2. Basic-JTAG-Implementation Basic-JTAG-Implementation Public

   The intent of this repository is to get a better understanding of JTAG

   SystemVerilog 1

3. RISC-V_DDCA RISC-V_DDCA Public

   A RISC-V processor implementation.

   SystemVerilog 1 2

4. Advance-FPGA-Design Advance-FPGA-Design Public

   Examples discussed in the book: "Advanced FPGA design: Architecture, Implementation, and Optimization" by Steve Kilts, in System Verilog.

   SystemVerilog 3 2

5. DE1-SoC-Projects DE1-SoC-Projects Public

   This repository contains simple projects that have been implemented to gain a better understanding of the architecture of the DE1-SoC board.

   Verilog

6. Yosys_to_aid_with_RTL_design Yosys_to_aid_with_RTL_design Public

   SystemVerilog 1