- Edinburgh, United Kingdom.
- https://www.linkedin.com/in/tej-sanghavi/
Stars
Hardcaml is an OCaml library for designing hardware.
iic-jku / IIC-OSIC-TOOLS
Forked from efabless/foss-asic-toolsIIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
A list of tutorials, paper, talks, and open-source projects for emerging compiler and architecture
ChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.
List of awesome semiconductor startups
This repo provide an index of VLSI content creators and their materials
Tiny ASIC implementation for "The Era of 1-bit LLMs All Large Language Models are in 1.58 Bits" matrix multiplication unit
OpenSource GPU, in Verilog, loosely based on RISC-V ISA
Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.
EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
Code generation tool for control and status registers
A minimal GPU design in Verilog to learn how GPUs work from the ground up
SystemVerilog language server client for Visual Studio Code
List of awesome open source hardware tools, generators, and reusable designs
Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference for understanding and implementing robust clock domain crossi…
draws an SVG schematic from a JSON netlist
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
A collection of learning resources for curious software engineers