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ia_decoder.tmpl.c
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ia_decoder.tmpl.c
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/* -*- Mode: C; tab-width: 8; indent-tabs-mode: t; c-basic-offset: 4 -*-
*
* IA Decoding Routines
*
* Copyright (C) 1995-2007, Hewlett-Packard Development Company, L.P.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*/
#include <limits.h> /* Just for INT_MIN as DECODE_FAILED? */
#undef MIN
#undef MAX
#include "std.h"
#include "bits.h"
#include "types.h"
#include "fields.h"
#include "sim.h"
#include "ia_exec.h"
#include "sign_ext.h"
extern BYTE iAmode;
Status iAinstFetchDecode(IAinstInfoPtr info);
#define DECODE_FAILED INT_MIN
#define overrideSize(x) ((x) ^= 6) /* flips between IA16 (2) & IA32 (4) */
typedef enum {
RegSrcEaDest, RegSrcNoDest,
EaSrcRegDest, EaSrcNoDest,
NoSrcEaDest, NoSrcRegDest,
LeaSrcRegDest,
LfpSrcRegDest, LfpSrcNoDest,
BoundSrcRegDest
} SrcDestType;
typedef const struct {
PIAEF execFn;
BYTE opSize;
SrcDestType sdt;
} GroupInfo, *GroupInfoPtr;
/* decode function */
typedef int (*PIADF)(ADDR4, struct ia_instinfo *);
static int ia_decode2(ADDR4 eip, IAinstInfoPtr info);
static const PIADF two_byte_opcode[256];
/* Utility Functions */
/* Fetch and Assemble a "size"-byte Immediate */
static int iAimm(ADDR4 eip, IADWORD *val, BYTE size)
{
BYTE imm[4];
if (!memIAIRd(eip, imm, size))
return DECODE_FAILED;
switch (size) {
case 1:
*val = sign_ext32(imm[0], 8);
break;
case 2:
*val = sign_ext32(imm[1]<<8 | imm[0], 16);
break;
case 4:
*val = imm[3]<<24 | imm[2]<<16 | imm[1]<<8 | imm[0];
break;
}
return size;
}
/* SIB Decode Function */
static int sib_decode(ADDR4 eip, IAinstInfoPtr info, BYTE mod,
PIARF *eaRdFn, PIAWF *eaWrFn, BYTE *defSeg)
{
SIB sib;
int len = 1;
if (!memIAIRd(eip, (BYTE *)&sib, 1))
return DECODE_FAILED;
info->scale = 1 << sib.ss;
info->index = (sib.index == ESP_REG) ? NO_REG : sib.index;
info->base = sib.base;
if (sib.base == ESP_REG)
*defSeg = SS_ID;
else if (sib.base == EBP_REG)
if (mod == 0) { /* disp32 */
len += iAimm(eip+1, &info->disp32, 4);
info->base = NO_REG;
*defSeg = DS_ID;
} else /* EBP */
*defSeg = SS_ID;
else
*defSeg = DS_ID;
*eaRdFn = sib_dispIARd;
*eaWrFn = memIAWr;
return len;
}
/* ModR/M Decode Tables */
static EaInfo ea16_info[3][8] = { /* Mod R/M */
{{ BX_REG, SI_REG, DS_ID, "%s[bx][si]" }, /* 0 0 */
{ BX_REG, DI_REG, DS_ID, "%s[bx][di]" }, /* 0 1 */
{ BP_REG, SI_REG, SS_ID, "%s[bp][si]" }, /* 0 2 */
{ BP_REG, DI_REG, SS_ID, "%s[bp][di]" }, /* 0 3 */
{ SI_REG, NO_REG, DS_ID, "%s[si]" }, /* 0 4 */
{ DI_REG, NO_REG, DS_ID, "%s[di]" }, /* 0 5 */
{ NO_REG, NO_REG, DS_ID, "%s[%s]" }, /* 0 6 */
{ BX_REG, NO_REG, DS_ID, "%s[bx]" }}, /* 0 7 */
{{ BX_REG, SI_REG, DS_ID, "%s%s[bx][si]" }, /* 1 0 */
{ BX_REG, DI_REG, DS_ID, "%s%s[bx][di]" }, /* 1 1 */
{ BP_REG, SI_REG, SS_ID, "%s%s[bp][si]" }, /* 1 2 */
{ BP_REG, DI_REG, SS_ID, "%s%s[bp][di]" }, /* 1 3 */
{ SI_REG, NO_REG, DS_ID, "%s%s[si]" }, /* 1 4 */
{ DI_REG, NO_REG, DS_ID, "%s%s[di]" }, /* 1 5 */
{ BP_REG, NO_REG, SS_ID, "%s%s[bp]" }, /* 1 6 */
{ BX_REG, NO_REG, DS_ID, "%s%s[bx]" }}, /* 1 7 */
{{ BX_REG, SI_REG, DS_ID, "%s%s[bx][si]" }, /* 2 0 */
{ BX_REG, DI_REG, DS_ID, "%s%s[bx][di]" }, /* 2 1 */
{ BP_REG, SI_REG, SS_ID, "%s%s[bp][si]" }, /* 2 2 */
{ BP_REG, DI_REG, SS_ID, "%s%s[bp][di]" }, /* 2 3 */
{ SI_REG, NO_REG, DS_ID, "%s%s[si]" }, /* 2 4 */
{ DI_REG, NO_REG, DS_ID, "%s%s[di]" }, /* 2 5 */
{ BP_REG, NO_REG, SS_ID, "%s%s[bp]" }, /* 2 6 */
{ BX_REG, NO_REG, DS_ID, "%s%s[bx]" }} /* 2 7 */
};
static EaInfo ea32_info[3][8] = { /* Mod R/M */
{{ EAX_REG, NO_REG, DS_ID, "%s[eax]" }, /* 0 0 */
{ ECX_REG, NO_REG, DS_ID, "%s[ecx]" }, /* 0 1 */
{ EDX_REG, NO_REG, DS_ID, "%s[edx]" }, /* 0 2 */
{ EBX_REG, NO_REG, DS_ID, "%s[ebx]" }, /* 0 3 */
{ NO_REG, NO_REG, DS_ID, "[--][--]" }, /* 0 4 */ /* SIB */
{ NO_REG, NO_REG, DS_ID, "%s[%s]" }, /* 0 5 */
{ ESI_REG, NO_REG, DS_ID, "%s[esi]" }, /* 0 6 */
{ EDI_REG, NO_REG, DS_ID, "%s[edi]" }}, /* 0 7 */
{{ EAX_REG, NO_REG, DS_ID, "%s%s[eax]" }, /* 1 0 */
{ ECX_REG, NO_REG, DS_ID, "%s%s[ecx]" }, /* 1 1 */
{ EDX_REG, NO_REG, DS_ID, "%s%s[edx]" }, /* 1 2 */
{ EBX_REG, NO_REG, DS_ID, "%s%s[ebx]" }, /* 1 3 */
{ NO_REG, NO_REG, DS_ID, "[--][--]" }, /* 1 4 */ /* SIB */
{ EBP_REG, NO_REG, SS_ID, "%s%s[ebp]" }, /* 1 5 */
{ ESI_REG, NO_REG, DS_ID, "%s%s[esi]" }, /* 1 6 */
{ EDI_REG, NO_REG, DS_ID, "%s%s[edi]" }}, /* 1 7 */
{{ EAX_REG, NO_REG, DS_ID, "%s%s[eax]" }, /* 2 0 */
{ ECX_REG, NO_REG, DS_ID, "%s%s[ecx]" }, /* 2 1 */
{ EDX_REG, NO_REG, DS_ID, "%s%s[edx]" }, /* 2 2 */
{ EBX_REG, NO_REG, DS_ID, "%s%s[ebx]" }, /* 2 3 */
{ NO_REG, NO_REG, DS_ID, "[--][--]" }, /* 2 4 */ /* SIB */
{ EBP_REG, NO_REG, SS_ID, "%s%s[ebp]" }, /* 2 5 */
{ ESI_REG, NO_REG, DS_ID, "%s%s[esi]" }, /* 2 6 */
{ EDI_REG, NO_REG, DS_ID, "%s%s[eax]" }} /* 2 7 */
};
EaInfoPtr ea16Info(ModRM modrm)
{
if (modrm.mod < 3)
return &ea16_info[modrm.mod][modrm.rm];
return 0;
}
EaInfoPtr ea32Info(ModRM modrm)
{
if (modrm.mod < 3)
return &ea32_info[modrm.mod][modrm.rm];
return 0;
}
/* ModR/M Decode Function */
static int modrm_decode(ADDR4 eip, IAinstInfoPtr info, PIAEF execFn,
PIADASF dasFn, SrcDestType sdt)
{
PIARF regRdFn, eaRdFn;
PIAWF regWrFn, eaWrFn;
ModRM modrm;
BYTE defSeg;
int len = 1;
if (!memIAIRd(eip, (BYTE *)&modrm, 1))
return DECODE_FAILED;
info->modrm = modrm;
info->reg = modrm.reg_op;
switch (info->opSize) {
case 1:
regRdFn = reg8IARd;
regWrFn = reg8IAWr;
break;
case 2:
regRdFn = reg16IARd;
regWrFn = reg16IAWr;
break;
case 4:
regRdFn = reg32IARd;
regWrFn = reg32IAWr;
break;
}
if (info->addrSize == IA16) { /* 16-bit addressing forms */
switch (modrm.mod) {
case 0:
if (modrm.rm == DISP16_RM) /* disp16 */
len += iAimm(eip+1, &info->disp32, 2);
else
info->disp32 = 0;
info->base = ea16_info[modrm.mod][modrm.rm].base;
info->index = ea16_info[modrm.mod][modrm.rm].index;
eaRdFn = modrm16_dispIARd;
eaWrFn = memIAWr;
defSeg = ea16_info[modrm.mod][modrm.rm].defSeg;
break;
case 1:
case 2:
len += iAimm(eip+1, &info->disp32, modrm.mod);
info->base = ea16_info[modrm.mod][modrm.rm].base;
info->index = ea16_info[modrm.mod][modrm.rm].index;
eaRdFn = modrm16_dispIARd;
eaWrFn = memIAWr;
defSeg = ea16_info[modrm.mod][modrm.rm].defSeg;
break;
case 3:
info->base = modrm.rm;
switch (info->opSize) {
case 1:
eaRdFn = base8IARd;
eaWrFn = base8IAWr;
break;
case 2:
eaRdFn = base16IARd;
eaWrFn = base16IAWr;
break;
case 4:
eaRdFn = base32IARd;
eaWrFn = base32IAWr;
break;
}
break;
}
} else { /* 32-bit addressing forms */
switch (modrm.mod) {
case 0:
info->disp32 = 0;
if (modrm.rm == SIB_RM)
len += sib_decode(++eip, info, modrm.mod, &eaRdFn, &eaWrFn,
&defSeg);
else {
if (modrm.rm == DISP32_RM) /* disp32 */
len += iAimm(eip+1, &info->disp32, 4);
info->base = ea32_info[modrm.mod][modrm.rm].base;
info->index = ea32_info[modrm.mod][modrm.rm].index;
eaRdFn = modrm32_dispIARd;
eaWrFn = memIAWr;
defSeg = ea32_info[modrm.mod][modrm.rm].defSeg;
}
break;
case 1:
case 2:
if (modrm.rm == SIB_RM)
len += sib_decode(++eip, info, modrm.mod, &eaRdFn, &eaWrFn,
&defSeg);
else {
info->base = ea32_info[modrm.mod][modrm.rm].base;
info->index = ea32_info[modrm.mod][modrm.rm].index;
eaRdFn = modrm32_dispIARd;
eaWrFn = memIAWr;
defSeg = ea32_info[modrm.mod][modrm.rm].defSeg;
}
len += iAimm(eip+1, &info->disp32, 3 * modrm.mod - 2);
break;
case 3:
info->base = modrm.rm;
switch (info->opSize) {
case 1:
eaRdFn = base8IARd;
eaWrFn = base8IAWr;
break;
case 2:
eaRdFn = base16IARd;
eaWrFn = base16IAWr;
break;
case 4:
eaRdFn = base32IARd;
eaWrFn = base32IAWr;
break;
}
break;
}
}
/* fill in info src/dest rd/wr functions based on source/dest type */
switch (sdt) {
case RegSrcEaDest:
info->srcRdFn = regRdFn;
info->destRdFn = eaRdFn;
info->destWrFn = eaWrFn;
break;
case RegSrcNoDest:
info->srcRdFn = regRdFn;
info->destRdFn = 0;
info->destWrFn = 0;
break;
case EaSrcRegDest:
info->srcRdFn = eaRdFn;
info->destRdFn = regRdFn;
info->destWrFn = regWrFn;
break;
case EaSrcNoDest:
info->srcRdFn = eaRdFn;
info->destRdFn = 0;
info->destWrFn = 0;
break;
case NoSrcEaDest:
info->srcRdFn = 0;
info->destRdFn = eaRdFn;
info->destWrFn = eaWrFn;
break;
case NoSrcRegDest:
info->srcRdFn = 0;
info->destRdFn = regRdFn;
info->destWrFn = regWrFn;
break;
case LeaSrcRegDest:
/* change srcRdFn from the standard memory read functions that
* were set up above to special functions that just return the
* effective address */
if (eaRdFn == modrm16_dispIARd)
info->srcRdFn = lea16IARd;
else if (eaRdFn == modrm32_dispIARd)
info->srcRdFn = lea32IARd;
else /* sib_dispIARd */
info->srcRdFn = leaSibIARd;
info->destRdFn = regRdFn;
info->destWrFn = regWrFn;
break;
case LfpSrcRegDest:
/* change srcRdFn from the standard memory read functions that
* were set up above to special functions that use opSize + 2
* for the size of the memory read */
if (eaRdFn == modrm16_dispIARd)
info->srcRdFn = load_far_ptr_16IARd;
else if (eaRdFn == modrm32_dispIARd)
info->srcRdFn = load_far_ptr_32IARd;
else /* sib_dispIARd */
info->srcRdFn = load_far_ptr_sibIARd;
info->destRdFn = regRdFn;
info->destWrFn = regWrFn;
break;
case LfpSrcNoDest:
/* change srcRdFn from the standard memory read functions that
* were set up above to special functions that use opSize + 2
* for the size of the memory read */
if (eaRdFn == modrm16_dispIARd)
info->srcRdFn = load_far_ptr_16IARd;
else if (eaRdFn == modrm32_dispIARd)
info->srcRdFn = load_far_ptr_32IARd;
else /* sib_dispIARd */
info->srcRdFn = load_far_ptr_sibIARd;
info->destRdFn = 0;
info->destWrFn = 0;
break;
case BoundSrcRegDest:
/* change srcRdFn from the standard memory read functions that
* were set up above to special functions that read both bound
* values */
if (eaRdFn == modrm16_dispIARd)
info->srcRdFn = bound16IARd;
else if (eaRdFn == modrm32_dispIARd)
info->srcRdFn = bound32IARd;
else /* sib_dispIARd */
info->srcRdFn = boundSibIARd;
info->destRdFn = regRdFn;
info->destWrFn = regWrFn;
break;
}
if (!info->segment) /* no segment override or SIB */
info->segment = defSeg;
info->execFn = execFn;
info->dasFn = dasFn;
return len;
}
/* Decode a Reg, Imm Instruction */
static int iAregImm(ADDR4 eip, IAinstInfoPtr info, PIAEF execFn,
PIADASF dasFn, BYTE reg)
{
info->srcRdFn = immIARd;
switch (info->opSize) {
case 1:
info->destRdFn = reg8IARd;
info->destWrFn = reg8IAWr;
break;
case 2:
info->destRdFn = reg16IARd;
info->destWrFn = reg16IAWr;
break;
case 4:
info->destRdFn = reg32IARd;
info->destWrFn = reg32IAWr;
break;
}
info->reg = reg;
info->execFn = execFn;
info->dasFn = dasFn;
return 1 + iAimm(eip+1, &info->imm32, info->opSize);
}
/* Decode a Reg Instruction */
static int iAreg(IAinstInfoPtr info, PIAEF execFn, PIADASF dasFn, BYTE reg)
{
info->srcRdFn = 0;
switch (info->opSize) {
case 1:
info->destRdFn = reg8IARd;
info->destWrFn = reg8IAWr;
break;
case 2:
info->destRdFn = reg16IARd;
info->destWrFn = reg16IAWr;
break;
case 4:
info->destRdFn = reg32IARd;
info->destWrFn = reg32IAWr;
break;
}
info->reg = reg;
info->execFn = execFn;
info->dasFn = dasFn;
return 1;
}
/* Decode a Reg, Reg Instruction */
static int iAregReg(IAinstInfoPtr info, PIAEF execFn, PIADASF dasFn,
BYTE dest, BYTE src)
{
switch (info->opSize) {
case 1:
info->srcRdFn = reg8IARd;
info->destRdFn = base8IARd;
info->destWrFn = base8IAWr;
break;
case 2:
info->srcRdFn = reg16IARd;
info->destRdFn = base16IARd;
info->destWrFn = base16IAWr;
break;
case 4:
info->srcRdFn = reg32IARd;
info->destRdFn = base32IARd;
info->destWrFn = base32IAWr;
break;
}
info->base = dest;
info->reg = src;
info->execFn = execFn;
info->dasFn = dasFn;
return 1;
}
/* Decode a Push Segment Register Instruction */
static int iApushSeg(IAinstInfoPtr info, BYTE src)
{
info->srcRdFn = segRegIARd;
info->reg = src;
if (StackAddrSize(info->mode) == IA16) {
info->destRdFn = push_spIARd;
info->destWrFn = push_spIAWr;
} else { /* IA32 */
info->destRdFn = push_espIARd;
info->destWrFn = push_espIAWr;
}
info->execFn = pushIAEx;
info->dasFn = push_seg_das;
return 1;
}
/* Decode a Push Register Instruction */
static int iApushReg(IAinstInfoPtr info, BYTE src)
{
if (info->opSize == IA16)
info->srcRdFn = reg16IARd;
else /* IA32 */
info->srcRdFn = reg32IARd;
info->reg = src;
if (StackAddrSize(info->mode) == IA16) {
info->destRdFn = push_spIARd;
info->destWrFn = push_spIAWr;
} else { /* IA32 */
info->destRdFn = push_espIARd;
info->destWrFn = push_espIAWr;
}
info->execFn = pushIAEx;
info->dasFn = push_reg_das;
return 1;
}
/* Decode a Pop Segment Register Instruction */
static int iApopSeg(IAinstInfoPtr info, BYTE dest)
{
if (StackAddrSize(info->mode) == IA16)
info->srcRdFn = pop_spIARd;
else /* IA32 */
info->srcRdFn = pop_espIARd;
info->destRdFn = segRegUpdateIARd;
info->destWrFn = segRegIAWr;
info->cond_seg = dest;
info->execFn = popIAEx;
info->dasFn = pop_seg_das;
return 1;
}
/* Decode a Pop Register Instruction */
static int iApopReg(IAinstInfoPtr info, BYTE dest)
{
if (StackAddrSize(info->mode) == IA16)
info->srcRdFn = pop_spIARd;
else /* IA32 */
info->srcRdFn = pop_espIARd;
if (info->opSize == IA16) {
info->destRdFn = reg16IARd;
info->destWrFn = reg16IAWr;
} else { /* IA32 */
info->destRdFn = reg32IARd;
info->destWrFn = reg32IAWr;
}
info->reg = dest;
info->execFn = popIAEx;
info->dasFn = pop_reg_das;
return 1;
}
/* One-Byte Opcode Decode Functions */
static int add_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 00 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, addIAEx, add_ExGx_das, RegSrcEaDest);
}
static int add_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 01 */
{
return 1 + modrm_decode(eip+1, info, addIAEx, add_ExGx_das, RegSrcEaDest);
}
static int add_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 02 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, addIAEx, add_GxEx_das, EaSrcRegDest);
}
static int add_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 03 */
{
return 1 + modrm_decode(eip+1, info, addIAEx, add_GxEx_das, EaSrcRegDest);
}
static int add_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 04 */
{
info->opSize = 1;
return iAregImm(eip, info, addIAEx, add_reg_imm_das, AL_REG);
}
static int add_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 05 */
{
return iAregImm(eip, info, addIAEx, add_reg_imm_das, EAX_REG);
}
/* ARGSUSED */
static int push_ES_decode(ADDR4 eip, IAinstInfoPtr info) /* 06 */
{
return iApushSeg(info, ES_REG);
}
/* ARGSUSED */
static int pop_ES_decode(ADDR4 eip, IAinstInfoPtr info) /* 07 */
{
return iApopSeg(info, ES_REG);
}
static int or_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 08 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, orIAEx, or_ExGx_das, RegSrcEaDest);
}
static int or_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 09 */
{
return 1 + modrm_decode(eip+1, info, orIAEx, or_ExGx_das, RegSrcEaDest);
}
static int or_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 0A */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, orIAEx, or_GxEx_das, EaSrcRegDest);
}
static int or_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 0B */
{
return 1 + modrm_decode(eip+1, info, orIAEx, or_GxEx_das, EaSrcRegDest);
}
static int or_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 0C */
{
info->opSize = 1;
return iAregImm(eip, info, orIAEx, or_reg_imm_das, AL_REG);
}
static int or_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 0D */
{
return iAregImm(eip, info, orIAEx, or_reg_imm_das, EAX_REG);
}
/* ARGSUSED */
static int push_CS_decode(ADDR4 eip, IAinstInfoPtr info) /* 0E */
{
return iApushSeg(info, CS_REG);
}
static int two_byte_escape(ADDR4 eip, IAinstInfoPtr info) /* 0F */
{
BYTE op2;
if (!memIAIRd(eip+1, &op2, 1))
return DECODE_FAILED;
return two_byte_opcode[op2](eip+1, info) + 1;
}
static int adc_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 10 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, adcIAEx, adc_ExGx_das, RegSrcEaDest);
}
static int adc_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 11 */
{
return 1 + modrm_decode(eip+1, info, adcIAEx, adc_ExGx_das, RegSrcEaDest);
}
static int adc_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 12 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, adcIAEx, adc_GxEx_das, EaSrcRegDest);
}
static int adc_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 13 */
{
return 1 + modrm_decode(eip+1, info, adcIAEx, adc_GxEx_das, EaSrcRegDest);
}
static int adc_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 14 */
{
info->opSize = 1;
return iAregImm(eip, info, adcIAEx, adc_reg_imm_das, AL_REG);
}
static int adc_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 15 */
{
return iAregImm(eip, info, adcIAEx, adc_reg_imm_das, EAX_REG);
}
/* ARGSUSED */
static int push_SS_decode(ADDR4 eip, IAinstInfoPtr info) /* 16 */
{
return iApushSeg(info, SS_REG);
}
/* ARGSUSED */
static int pop_SS_decode(ADDR4 eip, IAinstInfoPtr info) /* 17 */
{
return iApopSeg(info, SS_REG);
}
static int sbb_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 18 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, sbbIAEx, sbb_ExGx_das, RegSrcEaDest);
}
static int sbb_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 19 */
{
return 1 + modrm_decode(eip+1, info, sbbIAEx, sbb_ExGx_das, RegSrcEaDest);
}
static int sbb_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 1A */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, sbbIAEx, sbb_GxEx_das, EaSrcRegDest);
}
static int sbb_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 1B */
{
return 1 + modrm_decode(eip+1, info, sbbIAEx, sbb_GxEx_das, EaSrcRegDest);
}
static int sbb_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 1C */
{
info->opSize = 1;
return iAregImm(eip, info, sbbIAEx, sbb_reg_imm_das, AL_REG);
}
static int sbb_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 1D */
{
return iAregImm(eip, info, sbbIAEx, sbb_reg_imm_das, EAX_REG);
}
/* ARGSUSED */
static int push_DS_decode(ADDR4 eip, IAinstInfoPtr info) /* 1E */
{
return iApushSeg(info, DS_REG);
}
/* ARGSUSED */
static int pop_DS_decode(ADDR4 eip, IAinstInfoPtr info) /* 1F */
{
return iApopSeg(info, DS_REG);
}
static int and_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 20 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, andIAEx, and_ExGx_das, RegSrcEaDest);
}
static int and_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 21 */
{
return 1 + modrm_decode(eip+1, info, andIAEx, and_ExGx_das, RegSrcEaDest);
}
static int and_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 22 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, andIAEx, and_GxEx_das, EaSrcRegDest);
}
static int and_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 23 */
{
return 1 + modrm_decode(eip+1, info, andIAEx, and_GxEx_das, EaSrcRegDest);
}
static int and_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 24 */
{
info->opSize = 1;
return iAregImm(eip, info, andIAEx, and_reg_imm_das, AL_REG);
}
static int and_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 25 */
{
return iAregImm(eip, info, andIAEx, and_reg_imm_das, EAX_REG);
}
static int seg_ES_decode(ADDR4 eip, IAinstInfoPtr info) /* 26 */
{
info->segment = ES_ID;
return ia_decode2(eip+1, info) + 1;
}
/* ARGSUSED */
static int daa_decode(ADDR4 eip, IAinstInfoPtr info) /* 27 */
{
info->execFn = daaIAEx;
info->dasFn = daa_das;
return 1;
}
static int sub_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 28 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, subIAEx, sub_ExGx_das, RegSrcEaDest);
}
static int sub_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 29 */
{
return 1 + modrm_decode(eip+1, info, subIAEx, sub_ExGx_das, RegSrcEaDest);
}
static int sub_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 2A */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, subIAEx, sub_GxEx_das, EaSrcRegDest);
}
static int sub_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 2B */
{
return 1 + modrm_decode(eip+1, info, subIAEx, sub_GxEx_das, EaSrcRegDest);
}
static int sub_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 2C */
{
info->opSize = 1;
return iAregImm(eip, info, subIAEx, sub_reg_imm_das, AL_REG);
}
static int sub_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 2D */
{
return iAregImm(eip, info, subIAEx, sub_reg_imm_das, EAX_REG);
}
static int seg_CS_decode(ADDR4 eip, IAinstInfoPtr info) /* 2E */
{
info->segment = CS_ID;
return ia_decode2(eip+1, info) + 1;
}
/* ARGSUSED */
static int das_decode(ADDR4 eip, IAinstInfoPtr info) /* 2F */
{
info->execFn = dasIAEx;
info->dasFn = das_das;
return 1;
}
static int xor_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 30 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, xorIAEx, xor_ExGx_das, RegSrcEaDest);
}
static int xor_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 31 */
{
return 1 + modrm_decode(eip+1, info, xorIAEx, xor_ExGx_das, RegSrcEaDest);
}
static int xor_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 32 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, xorIAEx, xor_GxEx_das, EaSrcRegDest);
}
static int xor_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 33 */
{
return 1 + modrm_decode(eip+1, info, xorIAEx, xor_GxEx_das, EaSrcRegDest);
}
static int xor_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 34 */
{
info->opSize = 1;
return iAregImm(eip, info, xorIAEx, xor_reg_imm_das, AL_REG);
}
static int xor_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 35 */
{
return iAregImm(eip, info, xorIAEx, xor_reg_imm_das, EAX_REG);
}
static int seg_SS_decode(ADDR4 eip, IAinstInfoPtr info) /* 36 */
{
info->segment = SS_ID;
return ia_decode2(eip+1, info) + 1;
}
/* ARGSUSED */
static int aaa_decode(ADDR4 eip, IAinstInfoPtr info) /* 37 */
{
info->execFn = aaaIAEx;
info->dasFn = aaa_das;
return 1;
}
static int cmp_EbGb_decode(ADDR4 eip, IAinstInfoPtr info) /* 38 */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, cmpIAEx, cmp_ExGx_das, RegSrcEaDest);
}
static int cmp_EvGv_decode(ADDR4 eip, IAinstInfoPtr info) /* 39 */
{
return 1 + modrm_decode(eip+1, info, cmpIAEx, cmp_ExGx_das, RegSrcEaDest);
}
static int cmp_GbEb_decode(ADDR4 eip, IAinstInfoPtr info) /* 3A */
{
info->opSize = 1;
return 1 + modrm_decode(eip+1, info, cmpIAEx, cmp_GxEx_das, EaSrcRegDest);
}
static int cmp_GvEv_decode(ADDR4 eip, IAinstInfoPtr info) /* 3B */
{
return 1 + modrm_decode(eip+1, info, cmpIAEx, cmp_GxEx_das, EaSrcRegDest);
}
static int cmp_ALIb_decode(ADDR4 eip, IAinstInfoPtr info) /* 3C */
{
info->opSize = 1;
return iAregImm(eip, info, cmpIAEx, cmp_reg_imm_das, AL_REG);
}
static int cmp_eAXIv_decode(ADDR4 eip, IAinstInfoPtr info) /* 3D */
{
return iAregImm(eip, info, cmpIAEx, cmp_reg_imm_das, EAX_REG);
}
static int seg_DS_decode(ADDR4 eip, IAinstInfoPtr info) /* 3E */
{
info->segment = DS_ID;
return ia_decode2(eip+1, info) + 1;
}
/* ARGSUSED */
static int aas_decode(ADDR4 eip, IAinstInfoPtr info) /* 3F */
{
info->execFn = aasIAEx;
info->dasFn = aas_das;
return 1;
}
/* ARGSUSED */
static int inc_eAX_decode(ADDR4 eip, IAinstInfoPtr info) /* 40 */
{
return iAreg(info, incIAEx, inc_reg_das, EAX_REG);
}
/* ARGSUSED */
static int inc_eCX_decode(ADDR4 eip, IAinstInfoPtr info) /* 41 */
{
return iAreg(info, incIAEx, inc_reg_das, ECX_REG);
}
/* ARGSUSED */
static int inc_eDX_decode(ADDR4 eip, IAinstInfoPtr info) /* 42 */
{
return iAreg(info, incIAEx, inc_reg_das, EDX_REG);
}
/* ARGSUSED */
static int inc_eBX_decode(ADDR4 eip, IAinstInfoPtr info) /* 43 */
{
return iAreg(info, incIAEx, inc_reg_das, EBX_REG);
}
/* ARGSUSED */
static int inc_eSP_decode(ADDR4 eip, IAinstInfoPtr info) /* 44 */
{
return iAreg(info, incIAEx, inc_reg_das, ESP_REG);
}
/* ARGSUSED */
static int inc_eBP_decode(ADDR4 eip, IAinstInfoPtr info) /* 45 */
{
return iAreg(info, incIAEx, inc_reg_das, EBP_REG);
}
/* ARGSUSED */
static int inc_eSI_decode(ADDR4 eip, IAinstInfoPtr info) /* 46 */
{
return iAreg(info, incIAEx, inc_reg_das, ESI_REG);
}
/* ARGSUSED */
static int inc_eDI_decode(ADDR4 eip, IAinstInfoPtr info) /* 47 */
{
return iAreg(info, incIAEx, inc_reg_das, EDI_REG);
}
/* ARGSUSED */
static int dec_eAX_decode(ADDR4 eip, IAinstInfoPtr info) /* 48 */
{
return iAreg(info, decIAEx, dec_reg_das, EAX_REG);
}
/* ARGSUSED */
static int dec_eCX_decode(ADDR4 eip, IAinstInfoPtr info) /* 49 */
{
return iAreg(info, decIAEx, dec_reg_das, ECX_REG);
}
/* ARGSUSED */
static int dec_eDX_decode(ADDR4 eip, IAinstInfoPtr info) /* 4A */
{
return iAreg(info, decIAEx, dec_reg_das, EDX_REG);
}