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3 stars written in SystemVerilog
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Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

SystemVerilog 1,302 500 Updated Jul 15, 2024

VeeR EH1 core

SystemVerilog 791 216 Updated May 29, 2023

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

SystemVerilog 717 80 Updated Jun 21, 2024