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[BUG] Function multiversioning FEAT conditions are incorrect #320

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Wilco1 opened this issue Apr 25, 2024 · 2 comments
Open

[BUG] Function multiversioning FEAT conditions are incorrect #320

Wilco1 opened this issue Apr 25, 2024 · 2 comments
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@Wilco1
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Wilco1 commented Apr 25, 2024

In acle.md the table describing multiversioning has many entries like this:

310 FEAT_SVE sve ID_AA64PFR0_EL1.SVE != 0b0000 AND ID_AA64ZFR0_EL1.SVEver == 0b0000

In almost all cases using equality comparison is incorrect. The above means a multiversioned function for SVE would never be selected on a core with SVE2. So these version checks need to use >=, never ==.

Also, why not list the HWCAP instead as that is what actual implementations will use?

@kinoshita-fj
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I'd like to run the same function on both SVE core and SVE2 core using FMV. But FMV doesn't work as expected because of this odd definition. So I posted this issue to LLVM. Could you fix it ?

@labrinea
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labrinea commented Jun 4, 2024

It seems to me this is not specific to SVE, more features may be affected. We should be checking >= rather than equality.

labrinea added a commit to labrinea/acle that referenced this issue Jun 4, 2024
Some features are later versions of others, like sve2 and sve,
therefore performing equality checks on system register values
would incur incorrect feature detection on later hardware. See
ARM-software#320 for example.
Therefore we should instead do >= comparisons when HWCAP info
is not available.

I am also fixing incorrect detection for LSE and WFxT.
labrinea added a commit to labrinea/acle that referenced this issue Jun 13, 2024
Some features are later versions of others, like sve2 and sve,
therefore performing equality checks on system register values
would incur incorrect feature detection on later hardware. See
ARM-software#320 for example.
Therefore we should instead do >= comparisons when HWCAP info
is not available.

I am also fixing incorrect detection for LSE and WFxT. Lastly to
detect SVE2 and SME2 I am using the SVEVer and SMEVer bitfields
respectively.
labrinea added a commit to labrinea/acle that referenced this issue Jun 21, 2024
Some features are later versions of others, like sve2 and sve,
therefore performing equality checks on system register values
would incur incorrect feature detection on later hardware. See
ARM-software#320 for example.
Therefore we should instead do >= comparisons when HWCAP info
is not available.

I am also fixing incorrect detection for LSE and WFxT. Lastly to
detect SVE2 and SME2 I am using the SVEVer and SMEVer bitfields
respectively.
labrinea added a commit to labrinea/acle that referenced this issue Jun 25, 2024
Some features are later versions of others, like sve2 and sve,
therefore performing equality checks on system register values
would incur incorrect feature detection on later hardware. See
ARM-software#320 for example.
Therefore we should instead do >= comparisons when HWCAP info
is not available.

I am also fixing incorrect detection for LSE and WFxT. Lastly to
detect SVE2 and SME2 I am using the SVEVer and SMEVer bitfields
respectively.
labrinea added a commit to labrinea/acle that referenced this issue Jun 25, 2024
Some features are later versions of others, like sve2 and sve,
therefore performing equality checks on system register values
would incur incorrect feature detection on later hardware. See
ARM-software#320 for example.
Therefore we should instead do >= comparisons when HWCAP info
is not available.

I am also fixing incorrect detection for LSE and WFxT. Lastly to
detect SVE2 and SME2 I am using the SVEVer and SMEVer bitfields
respectively.
vhscampos pushed a commit that referenced this issue Jun 25, 2024
Some features are later versions of others, like sve2 and sve,
therefore performing equality checks on system register values
would incur incorrect feature detection on later hardware. See
#320 for example.
Therefore we should instead do >= comparisons when HWCAP info
is not available.

I am also fixing incorrect detection for LSE and WFxT. Lastly to
detect SVE2 and SME2 I am using the SVEVer and SMEVer bitfields
respectively.
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