Address textual issues raised

main/acle.md

@@ -367,13 +367,13 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin
     feature names are appended in lexicographic order, not in priority order.
   * Mangled names contain a unique set of features (no duplicates).
   * Added [MOPS](#memcpy-family-of-operations-intrinsics---mops).
-  * Change name mangling of the default version.
-  * Align priorities to account for feature dependencies.
-  * Introduce alternative names (aliases) `rdma` for `rdm`.
-  * Correct FEAT_BTI feature register value.
+  * Changed name mangling of the default version.
+  * Aligned priorities to account for feature dependencies.
+  * Introduced alternative names (aliases) `rdma` for `rdm`.
+  * Corrected FEAT_BTI feature register value.
 * Introduced the `__ARM_FEATURE_PAUTH_LR` feature macro in section
   [Pointer Authentication](#pointer-authentication) to indicate target support
-  for the Armv9.5-A's PAC Enhancements.
+  for the Armv9.5-A PAC Enhancements.
 * Introduced a new value to the `__ARM_FEATURE_PAC_DEFAULT` macro to indicate
   the use of PC as a diversifier for [Pointer Authentication](#pointer-authentication).
 * Added a [State management](#state-management) section, replacing the
@@ -5026,7 +5026,7 @@ internally. The comments describe when ZA should be saved and restored:
   }
 ```
 
-ZT0 cannot be lazily saved, so if ZT0 is live before a call to a
+ZT0 cannot be saved lazily, so if ZT0 is live before a call to a
 function that does not share ZT0, the compiler must save and restore
 ZT0 around the call. For example:
 
@@ -9365,7 +9365,7 @@ tuple types `svboolx2_t` and `svboolx4_t`.
 
 These are opaque tuple types that can be accessed using the SVE intrinsics
 `svsetN`, `svgetN` and `svcreateN`. `svundef2` and `svundef4` are also extended
-to work with `svboolx2_t` and `svboolx4_t`.  e.g.
+to work with `svboolx2_t` and `svboolx4_t`. For example:
 
 ``` c
     svbool_t svget2[_b](svboolx2_t tuple, uint64_t imm_index);
@@ -9473,12 +9473,12 @@ The intrinsics in this section have the following properties in common:
 
 *   Some SME instructions identify a slice of ZA using the sum of a 32-bit
     general-purpose register and an immediate offset.  The intrinsics for
-    these instructions have a 32-bit argument called `slice`, which is
+    these instructions have a 32-bit argument named `slice`, which is
     interpreted as follows:
 
     *   If the intrinsic also has a `vnum` argument, the ZA slice number
         is calculated by adding `vnum` to `slice`.  Both `slice` and `vnum`
-        can both be variable.
+        can be variable.
 
     *   Otherwise, `slice` specifies the ZA slice number directly; that is,
         it represents the sum of the 32-bit register and the immediate
@@ -9496,7 +9496,7 @@ SME2 adds operations that work on groups of SVE vectors, ZA tile slices or
 ZA array vectors. The intrinsics model this in the following way:
 
 *   Multi-vector operands are groups of SVE data vectors, that use the same
-    tuple types as defined in the [SVE ACLE](#sve-vector-types), e.g.
+    tuple types as defined in the [SVE ACLE](#sve-vector-types), for example,
     `svint32x2_t` for a multi-vector operand of two 32-bit element vectors, or
     `svint64x4_t` for a multi-vector operand of four 64-bit element vectors.