Skip to content
View ChanningCh's full-sized avatar
🎯
Focusing
🎯
Focusing

Block or report ChanningCh

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

All in one vscode plugin for HDL development

Verilog 379 11 Updated Sep 30, 2024

Implement a bitonic sorting network on FPGA

Verilog 38 10 Updated Nov 6, 2021

同文安卓輸入法平臺3.x/Android-rime/Rime Input Method Engine for Android

Kotlin 3,077 370 Updated Sep 18, 2024

这是一个Android系统TTS应用,内置微软演示接口,可自定义HTTP请求,可导入其他本地TTS引擎,以及根据中文双引号的简单旁白/对话识别朗读 ,还有自动重试,备用配置,文本替换等更多功能。

Kotlin 3,228 267 Updated Aug 12, 2024

Verilog Ethernet components for FPGA implementation

Verilog 2,235 688 Updated Jul 18, 2024

DPI Aware mouse move across screens

C# 3,643 178 Updated Aug 26, 2024

A Verilog implementation of DisplayPort protocol for FPGAs

Verilog 230 44 Updated Mar 15, 2019

帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目

3,870 657 Updated May 15, 2022

在vscode上的数字设计开发插件

Verilog 321 20 Updated Jan 27, 2023

聪明方法学Python,简明且系统的 Python 入门教程。

Jupyter Notebook 331 92 Updated Jan 9, 2024

研究生阶段的一些文章(技术、思考、读书笔记、日常琐事等)

HTML 518 243 Updated Jun 15, 2020

研究生阶段的一些文章(技术、思考、读书笔记、日常琐事等)

HTML 1 Updated Jun 15, 2020

Python Productivity for ZYNQ

Jupyter Notebook 1,975 814 Updated Aug 26, 2024

The USRP™ Hardware Driver FPGA Repository

Verilog 260 203 Updated Dec 13, 2021