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Merge tag 'tty-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/…
…git/gregkh/tty Pull tty / serial driver updates from Greg KH: "Here is the big set of serial and tty driver updates for 6.3-rc1. Once again, Jiri and Ilpo have done a number of core vt and tty/serial layer cleanups that were much needed and appreciated. Other than that, it's just a bunch of little tty/serial driver updates: - qcom-geni-serial driver updates - liteuart driver updates - hvcs driver cleanups - n_gsm updates and additions for new features - more 8250 device support added - fpga/dfl update and additions - imx serial driver updates - fsl_lpuart updates - other tiny fixes and updates for serial drivers All of these have been in linux-next for a while with no reported problems" * tag 'tty-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (143 commits) tty: n_gsm: add keep alive support serial: imx: remove a redundant check dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties soc: qcom: geni-se: Move qcom-geni-se.h to linux/soc/qcom/geni-se.h tty: n_gsm: add TIOCMIWAIT support tty: n_gsm: add RING/CD control support tty: n_gsm: mark unusable ioctl structure fields accordingly serial: imx: get rid of registers shadowing serial: imx: refine local variables in rxint() serial: imx: stop using USR2 in FIFO reading loop serial: imx: remove redundant USR2 read from FIFO reading loop serial: imx: do not break from FIFO reading loop prematurely serial: imx: do not sysrq broken chars serial: imx: work-around for hardware RX flood serial: imx: factor-out common code to imx_uart_soft_reset() serial: 8250_pci1xxxx: Add power management functions to quad-uart driver serial: 8250_pci1xxxx: Add RS485 support to quad-uart driver serial: 8250_pci1xxxx: Add driver for quad-uart support serial: 8250_pci: Add serial8250_pci_setup_port definition in 8250_pcilib.c tty: pcn_uart: fix memory leak with using debugfs_lookup() ...
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Documentation/devicetree/bindings/serial/qcom,msm-uart.txt
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Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/serial/qcom,msm-uart.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Qualcomm MSM SoC Serial UART | ||
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maintainers: | ||
- Bjorn Andersson <andersson@kernel.org> | ||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | ||
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description: | ||
The MSM serial UART hardware is designed for low-speed use cases where a | ||
dma-engine isn't needed. From a software perspective it's mostly compatible | ||
with the MSM serial UARTDM except that it only supports reading and writing | ||
one character at a time. | ||
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properties: | ||
compatible: | ||
const: qcom,msm-uart | ||
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clocks: | ||
maxItems: 1 | ||
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clock-names: | ||
items: | ||
- const: core | ||
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interrupts: | ||
maxItems: 1 | ||
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reg: | ||
maxItems: 1 | ||
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required: | ||
- compatible | ||
- clock-names | ||
- clocks | ||
- interrupts | ||
- reg | ||
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unevaluatedProperties: false | ||
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allOf: | ||
- $ref: /schemas/serial/serial.yaml# | ||
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examples: | ||
- | | ||
serial@a9c00000 { | ||
compatible = "qcom,msm-uart"; | ||
reg = <0xa9c00000 0x1000>; | ||
interrupts = <11>; | ||
clocks = <&uart_cxc>; | ||
clock-names = "core"; | ||
}; |
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