zeroize: add more SIMD register support for aarch64 #966
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tarcieri
reviewed
Oct 23, 2023
Comment on lines
+33
to
+50
| int8x8_t, | ||
| int8x16_t, | ||
| int16x4_t, | ||
| int16x8_t, | ||
| int32x2_t, | ||
| int32x4_t, | ||
| int64x1_t, | ||
| int64x2_t, | ||
| float32x2_t, | ||
| float32x4_t, | ||
| float64x1_t, | ||
| float64x2_t, | ||
| poly8x8_t, | ||
| poly8x16_t, | ||
| poly16x4_t, | ||
| poly16x8_t, | ||
| poly64x1_t, | ||
| poly64x2_t, |
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I would suggest putting these in alphabetical order (I'd suggest, but they're all below uint already)
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This PR adds SIMD support for:
int*,float*, andpoly*SIMD registers onAarch64.