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L3 R3: xinyisemi Cat.1 SoC (XY4100/XY4100S)

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.github		.github
.editorconfig		.editorconfig
.gitattributes		.gitattributes
.gitignore		.gitignore
README.md		README.md
index.json		index.json

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XY4100

xinyisemi：Cortex-M3
L3R3：240MHz

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240 MHz Cortex-M3

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L3 R3: xinyisemi Cat.1 SoC (XY4100/XY4100S)

soc cat1 qitas cat1bis xinyisemi

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