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Issues: SpinalHDL/NaxRiscv
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[BUG] A trap is triggered when the pmpcfg register is read by csrr
#110
opened Jun 28, 2024 by
Bill94l
Default branch direction prediction should be TAKEN (currently NOT TAKEN)
#79
opened Jan 30, 2024 by
ronan-lashermes
How to change to write through DCache and invalidate from NOC
#24
opened Mar 12, 2023 by
franktaTian
Different behavior compared to spike when accessing an invalid address
#12
opened Sep 23, 2022 by
mmxsrup
threshold of maxiumum count of Naxcore that can be possible to simulate ?
#62
opened Nov 6, 2023 by
SoCSavant
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