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Commits on Sep 28, 2022

• Boards upgraded to 2022.1 tools

  skalade

  committedSep 28, 2022
  d75f95a

Commits on Sep 21, 2022

• Initial steps to use Vivado 2022.1 (Xilinx#1339)

  

  mariodruiz

  and

  Mario Ruiz

  authoredSep 21, 2022
  8e79de4

Commits on Jul 29, 2021

• Refactor code to use Vitis HLS (Xilinx#1204)

  mariodruiz

  authoredJul 29, 2021
  0b423f5

Commits on Jul 19, 2021

• Fix mb-ar *.o issue in Vitis 2020.1

  

  Cathal McCabe

  authored and

  schelleg

  committedJul 19, 2021
  b67968a

Commits on Sep 2, 2020

• Fix Microblaze addressing with 2020.1 (Xilinx#1115)

  PeterOgden

  authoredSep 2, 2020
  4f7c651

Commits on Feb 15, 2019

• clean up pynqmicroblaze package (Xilinx#809)

  

  Yun Rock Qu

  authored and

  schelleg

  committedFeb 15, 2019
  77c801a

Commits on Jan 25, 2019

• modify xczu7ev-ffvc1156-2-i-es2 to xczu7ev-ffvc1156-2-i (Xilinx#775)

  

  sonnyhcl

  authored and

  schelleg

  committedJan 25, 2019
  a932c31

Commits on Aug 28, 2018

• update clock period to fix 2018.2 flow

  

  Rock Qu

  authored and

  schelleg

  committedAug 28, 2018
  830c5f3

Commits on Jun 12, 2018

• Add first pass at a base overlay for ZCU104 (without bitstream)

  

  PeterOgden

  authored and

  schelleg

  committedJun 12, 2018
  5e18b7d

Commits on May 18, 2018

• add wire_distributor to handle transitions between undef and GPIO interfaces

  

  Rock Qu

  authored and

  schelleg

  committedMay 18, 2018
  83d5a26

• add interface_slice to monitor any given IO interface type

  

  Rock Qu

  authored and

  schelleg

  committedMay 18, 2018
  483dd8e

• update trace_cntrl hls period requirements to meet timing

  

  Rock Qu

  authored and

  schelleg

  committedMay 18, 2018
  3151c45

• remove unused port from io_switch

  

  Rock Qu

  authored and

  schelleg

  committedMay 18, 2018
  39fdf7d

• update color_swap vendor name

  

  Rock Qu

  authored and

  schelleg

  committedMay 18, 2018
  0c9992e

Commits on Mar 19, 2018

• remove 0 as option when timer is disabled (Xilinx#599)

  

  Yun Rock Qu

  authored and

  schelleg

  committedMar 19, 2018
  2496227

• modified to add raspberrypi support

  

  parimalp

  authored and

  schelleg

  committedMar 19, 2018
  6e4d172

Commits on Feb 9, 2018

• update io_switch driver (Xilinx#540)

  

  Yun Rock Qu

  authored and

  schelleg

  committedFeb 9, 2018
  b6d45f9

Commits on Jan 30, 2018

• IP refactor (Xilinx#525)

  

  Yun Rock Qu

  authored and

  schelleg

  committedJan 30, 2018
  ff13cc2

Commits on Jan 19, 2018

• remove outdated IPs and add new IPs (Xilinx#501)

  

  Yun Rock Qu

  authored and

  schelleg

  committedJan 19, 2018
  b8e946b

Commits on Aug 8, 2017

• Update docs

  

  cathalmccabe

  authored and

  schelleg

  committedAug 8, 2017
  5d372c2

Commits on Jul 30, 2017

• V2.0 logictools fix step (Xilinx#390)

  

  Yun Rock Qu

  authored and

  schelleg

  committedJul 30, 2017
  11c1bce

Commits on Jul 25, 2017

• retire trace_cntrl 1.2

  

  Yun Rock Qu

  authored and

  schelleg

  committedJul 25, 2017
  f24b397

Commits on Jul 21, 2017

• adding sdk and bsp folders

  

  Yun Rock Qu

  authored and

  schelleg

  committedJul 21, 2017
  3051ac0

Commits on Jul 11, 2017

• Generate the Trace Controller IP

  

  PeterOgden

  authored and

  schelleg

  committedJul 11, 2017
  de5a372

Commits on Jun 23, 2017

• updating drivers and sdk build flow for restructure

  

  root

  authored and

  schelleg

  committedJun 23, 2017
  ee7cf5d

Commits on May 18, 2017

• Update base overlay with new video IP

  

  PeterOgden

  authored and

  schelleg

  committedMay 18, 2017
  19a33c7

• Add IP required for the new video pipeline

  

  PeterOgden

  authored and

  schelleg

  committedMay 18, 2017
  13c5a00

Commits on Apr 6, 2017

• Initial Restructuring - vivado and pynq

  schelleg

  committedApr 6, 2017
  83d9d70

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