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MMEM:DOWN:ABOR added into SCPI doc
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Prasimix committed Apr 10, 2018
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8 changes: 8 additions & 0 deletions doc/SCPI reference guide/Commands/EEZ PSU SCPI reference 12 - SCPI commands summary.html
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<p class="scpi3" style="margin-left: 0;">&#160;</p>
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<p class="scpi2">:ABORt</p>
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<p>Aborts current download session</p>
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<p class="scpi2">:DATA :DATA {#&lt;length&gt;,&lt;encoding&gt;,&lt;block&gt;}</p>
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12 changes: 6 additions & 6 deletions doc/SCPI reference guide/Commands/EEZ PSU SCPI reference 3 - registers and queue.html
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<p class="Caption">Fig. 1: Summary of status structure registers</p>
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<p>&#160;</p>
<p class="Heading_2">3.1. <a name="__RefHeading__5462_1776152697"></a><a name="__RefNumPara__5224_1776698109"></a><a name="std_even_stat_reg"></a>Standard Event Status Register<a name="__RefHeading__5462_1776152697"></a><a name="__RefNumPara__5224_1776698109"></a></p>
<p class="Heading_2">3.1. <a name="__RefNumPara__5224_1776698109"></a><a name="__RefHeading__5462_1776152697"></a><a name="std_even_stat_reg"></a>Standard Event Status Register<a name="__RefNumPara__5224_1776698109"></a><a name="__RefHeading__5462_1776152697"></a></p>
<p>An status register group is consist of Condition, Event and Enable registers (see Fig. 1):</p>
<ul>
<li class="List_1_Start" style="text-indent: 0; list-style-type: disc;">The Condition register is a read-only register, which holds the live (unlatched) operational status of the instrument. Reading the Condition register does not clear it.</li>
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<p style="text-align: center;">64</p>
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<p>User Request (URQ) – This event bit indicates that the PSU input device (TFT Touch screen) has been for any reason activated. The setting of this event-bit occur regardless of the IEEE 488.1 Remote/Local state of the device (not implemented yet)</p>
<p>User Request (URQ) – This event bit indicates that the PSU input device (TFT Touch screen) has been for any reason activated. The setting of this event-bit occur regardless of the IEEE 488.1 Remote/Local state of the device (<span style="font-style: italic;">not implemented yet</span>)</p>
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<p>&#160;</p>
<p class="Heading_2">3.2. <a name="__RefHeading__6866_1044300784"></a><a name="__RefNumPara__7055_1776698109"></a><a name="stat_byte_reg"></a>Status Byte Register<a name="__RefHeading__6866_1044300784"></a><a name="__RefNumPara__7055_1776698109"></a></p>
<p class="Heading_2">3.2. <a name="__RefNumPara__7055_1776698109"></a><a name="__RefHeading__6866_1044300784"></a><a name="stat_byte_reg"></a>Status Byte Register<a name="__RefNumPara__7055_1776698109"></a><a name="__RefHeading__6866_1044300784"></a></p>
<p>The Status Byte summary register reports conditions from the other status registers (see Fig. 1). Query data that is waiting in the PSU’s output buffer is immediately reported through the &quot;Message Available&quot; (MAV) bit (bit 4) of the Status Byte register. Bits in the summary register are NOT latched. Clearing an event register will clear the corresponding bits in the Status Byte summary register. Reading all messages in the output buffer, including any pending queries, will clear the message available bit (MAV).</p>
<p>The Status Byte summary register is cleared when the *CLS (clear status) command has been executed.</p>
<p>The Status Byte enable register (request service) is cleared when the *SRE 0 command has been executed.</p>
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<p style="text-align: center;">16</p>
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<p>MEASuring – Channel is performing measurement (not implemented yet)</p>
<p>MEASuring – Channel is performing measurement (<span style="font-style: italic;">not implemented yet)</span></p>
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<p>&#160;</p>
<p>The Questionable Status Enable register is cleared when the STAT:QUES:ENAB 0 command is executed. The *CLS command can be also used to clear the register.</p>
<p class="Heading_3">3.4.1. <a name="__RefHeading__17188_670294931"></a><a name="__RefNumPara__35965_1442645923"></a><a name="ques_inst_stat_reg"></a>Questionable INSTrument Status register<a name="__RefHeading__17188_670294931"></a><a name="__RefNumPara__35965_1442645923"></a></p>
<p class="Heading_3">3.4.1. <a name="__RefNumPara__35965_1442645923"></a><a name="__RefHeading__17188_670294931"></a><a name="ques_inst_stat_reg"></a>Questionable INSTrument Status register<a name="__RefNumPara__35965_1442645923"></a><a name="__RefHeading__17188_670294931"></a></p>
<p>Bit definition for QUEStionable INSTrument register:</p>
<p>&#160;</p>
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<p class="Heading_3">3.4.2. <a name="__RefNumPara__35967_1442645923"></a><a name="__RefHeading__17192_670294931"></a><a name="ques_isum_stat_reg"></a>Questionable Instrument SUMmary status register<a name="__RefNumPara__35967_1442645923"></a><a name="__RefHeading__17192_670294931"></a></p>
<p class="Heading_3">3.4.2. <a name="__RefHeading__17192_670294931"></a><a name="__RefNumPara__35967_1442645923"></a><a name="ques_isum_stat_reg"></a>Questionable Instrument SUMmary status register<a name="__RefHeading__17192_670294931"></a><a name="__RefNumPara__35967_1442645923"></a></p>
<p>There are two questionable instrument summary registers, one for each PSU output. These registers provide information about voltage and current regulation. </p>
<p>Bit definition for QUEStionable INSTrument SUMmary register:</p>
<p>&#160;</p>
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4 changes: 3 additions & 1 deletion doc/SCPI reference guide/Commands/EEZ PSU SCPI reference 4 - common comand reference.html
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<p>Syntax</p>
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<p class="cmd_root">*WAI (not implemented yet)</p>
<p class="cmd_root">*WAI</p>
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<p>Description</p>
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<p style="font-style: italic;">Not implemented yet</p>
<p>&#160;</p>
<p>The Wait-to-Continue Command causes the PSU to wait until all pending commands are completed before executing any other commands. </p>
<p>&#160;</p>
<p>Pending operations are as defined under the *OPC command. </p>
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73 changes: 58 additions & 15 deletions doc/SCPI reference guide/Commands/EEZ PSU SCPI reference 5.10 - MMEMory.html
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<p class="scpi3" style="margin-left: 0;">&#160;</p>
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<p class="scpi2">:ABORt</p>
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<p>Aborts current download session</p>
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<p class="scpi2"><a href="#mmem_down_data"><span style="text-decoration: underline;">:DATA {#&lt;length-digits&gt;&lt;length&gt;&lt;block&gt;}</span></a></p>
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<p class="Heading_3">5.10.7. <a name="mmem_down_data"></a>MMEMory:DOWNload:DATA</p>
<p class="Heading_3">5.10.7. <a name="mmem_abor"></a>MMEMory:DOWNload:ABORt</p>
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<p>Syntax</p>
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<p class="cmd_root">MMEMory:DOWNload:ABORt</p>
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<p>Description</p>
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<p>Use this command to abort currenlty running file transfer from the host initiated with the MMEMory:DOWNload:DATA command. If not active file transfer exists, the PSU will ignore this command without generating any error.</p>
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<p class="Default_ntt">Usage<span style="font-style: italic;"> </span>example</p>
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<p class="cmd_code">MMEM:ABOR</p>
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<p class="Default_ntt">Related Commands</p>
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<p>MMEMory:DOWNload:DATA</p>
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<p class="Heading_3">5.10.8. <a name="mmem_down_data"></a>MMEMory:DOWNload:DATA</p>
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<p class="Heading_3">5.10.8. <a name="mmem_down_fnam"></a>MMEMory:DOWNload:FNAMe</p>
<p class="Heading_3">5.10.9. <a name="mmem_down_fnam"></a>MMEMory:DOWNload:FNAMe</p>
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<p class="Heading_3">5.10.9. <a name="mmem_info"></a>MMEMory:INFOrmation</p>
<p class="Heading_3">5.10.10. <a name="mmem_info"></a>MMEMory:INFOrmation</p>
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<p>Description</p>
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<p><span style="color: #000000;">Use t</span><span style="color: #000000;">his command </span><span style="color: #000000;">to find out</span><span style="color: #000000;"> </span>total amount of storage currently used and storage available on the SD card. The sum of that two amounts represents SD card capacity in bytes.</p>
<p><span style="color: #000000;">Use this command to find out </span>total amount of storage currently used and storage available on the SD card. The sum of that two amounts represents SD card capacity in bytes.</p>
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<p class="Heading_3">5.10.10. <a name="mmem_load_list"></a>MMEMory:LOAD:LIST</p>
<p class="Heading_3">5.10.11. <a name="mmem_load_list"></a>MMEMory:LOAD:LIST</p>
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<p class="Heading_3">5.10.11. <a name="mmem_load_prof"></a>MMEMory:LOAD:PROFile</p>
<p class="Heading_3">5.10.12. <a name="mmem_load_prof"></a>MMEMory:LOAD:PROFile</p>
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<p class="Heading_3">5.10.12. <a name="mmem_lock"></a>MMEMory:LOCK</p>
<p class="Heading_3">5.10.13. <a name="mmem_lock"></a>MMEMory:LOCK</p>
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<p class="Heading_3">5.10.13. <a name="mmem_mdir"></a>MMEMory:MDIRectory</p>
<p class="Heading_3">5.10.14. <a name="mmem_mdir"></a>MMEMory:MDIRectory</p>
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<p class="Heading_3">5.10.14. <a name="mmem_move"></a>MMEMory:MOVE</p>
<p class="Heading_3">5.10.15. <a name="mmem_move"></a>MMEMory:MOVE</p>
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<p class="Heading_3">5.10.15. <a name="mmem_rdir"></a>MMEMory:RDIRectory</p>
<p class="Heading_3">5.10.16. <a name="mmem_rdir"></a>MMEMory:RDIRectory</p>
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<p class="Heading_3">5.10.16. <a name="mmem_stor_list"></a>MMEMory:STORe:LIST</p>
<p class="Heading_3">5.10.17. <a name="mmem_stor_list"></a>MMEMory:STORe:LIST</p>
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<p class="Heading_3">5.10.17. <a name="mmem_stor_prof"></a>MMEMory:STORe:PROFile</p>
<p class="Heading_3">5.10.18. <a name="mmem_stor_prof"></a>MMEMory:STORe:PROFile</p>
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<p class="Heading_3">5.10.18. <a name="mmem_time"></a>MMEMory:TIME</p>
<p class="Heading_3">5.10.19. <a name="mmem_time"></a>MMEMory:TIME</p>
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<p class="Heading_3">5.10.19. <a name="mmem_unl"></a>MMEMory:UNLock</p>
<p class="Heading_3">5.10.20. <a name="mmem_unl"></a>MMEMory:UNLock</p>
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<p class="Heading_3">5.10.20. <a name="mmem_upl"></a>MMEMory:UPLoad</p>
<p class="Heading_3">5.10.21. <a name="mmem_upl"></a>MMEMory:UPLoad</p>
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