[WIP] adopt testbench and test firmware to machine ISA

elvisfox · Sep 18, 2022 · ede2d66 · ede2d66
1 parent 1e464cf
commit ede2d66
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Showing 10 changed files with 451 additions and 224 deletions.
diff --git a/.gitignore b/.gitignore
@@ -1,5 +1,7 @@
-bin
-/bin/**/*
+/bin
+/tb/modelsim.ini
+/tb/vsim.wlf
+/tb/rtl_work
 # /tests/*.o
 # /firmware/*.o
 # /firmware/firmware.bin

diff --git a/Makefile b/Makefile
@@ -107,7 +107,7 @@ COMPRESSED_ISA = C
 # synth.v: picorv32.v scripts/yosys/synth_sim.ys
 # 	yosys -qv3 -l synth.log scripts/yosys/synth_sim.ys
 
-all: bin/test/firmware.memh
+all: bin/test/firmware.memh bin/test/firmware.lss
 
 %.memh: %.bin utils/makehex.py
 	$(PYTHON) utils/makehex.py $< 32768 > $@
@@ -116,6 +116,9 @@ all: bin/test/firmware.memh
 	$(TOOLCHAIN_PREFIX)objcopy -O binary $< $@
 	chmod -x $@
 
+%.lss: %.elf
+	$(TOOLCHAIN_PREFIX)objdump -S $< > $@
+
 bin/test/firmware.elf: $(TEST_FW_OBJS) $(TEST_OBJS) fw/test/sections.lds
 	$(TOOLCHAIN_PREFIX)gcc -Os -mabi=ilp32 -march=rv32im$(subst C,c,$(COMPRESSED_ISA)) -ffreestanding -nostdlib -o $@ \
 		-Wl,--build-id=none,-Bstatic,-T,fw/test/sections.lds,-Map,$(dir $@)firmware.map,--strip-debug \

diff --git a/fw/test/custom_ops.S b/fw/test/custom_ops.S
@@ -79,32 +79,36 @@
 // x8 is s0 and also fp
 #define regnum_fp   8
 
+// CSRs
+#define csr_custom_irq_mask 0x7C0
+#define csr_custom_irq_pend 0x7C1
+
 #define r_type_insn(_f7, _rs2, _rs1, _f3, _rd, _opc) \
 .word (((_f7) << 25) | ((_rs2) << 20) | ((_rs1) << 15) | ((_f3) << 12) | ((_rd) << 7) | ((_opc) << 0))
 
-#define picorv32_getq_insn(_rd, _qs) \
-r_type_insn(0b0000000, 0, regnum_ ## _qs, 0b100, regnum_ ## _rd, 0b0001011)
+# #define picorv32_getq_insn(_rd, _qs) \
+# r_type_insn(0b0000000, 0, regnum_ ## _qs, 0b100, regnum_ ## _rd, 0b0001011)
 
-#define picorv32_setq_insn(_qd, _rs) \
-r_type_insn(0b0000001, 0, regnum_ ## _rs, 0b010, regnum_ ## _qd, 0b0001011)
+# #define picorv32_setq_insn(_qd, _rs) \
+# r_type_insn(0b0000001, 0, regnum_ ## _rs, 0b010, regnum_ ## _qd, 0b0001011)
 
-#define picorv32_retirq_insn() \
-r_type_insn(0b0000010, 0, 0, 0b000, 0, 0b0001011)
+# #define picorv32_retirq_insn() \
+# r_type_insn(0b0000010, 0, 0, 0b000, 0, 0b0001011)
 
-#define picorv32_maskirq_insn(_rd, _rs) \
-r_type_insn(0b0000011, 0, regnum_ ## _rs, 0b110, regnum_ ## _rd, 0b0001011)
+# #define picorv32_maskirq_insn(_rd, _rs) \
+# r_type_insn(0b0000011, 0, regnum_ ## _rs, 0b110, regnum_ ## _rd, 0b0001011)
 
-#define picorv32_waitirq_insn(_rd) \
-r_type_insn(0b0000100, 0, 0, 0b100, regnum_ ## _rd, 0b0001011)
+# #define picorv32_waitirq_insn(_rd) \
+# r_type_insn(0b0000100, 0, 0, 0b100, regnum_ ## _rd, 0b0001011)
 
-#define picorv32_trigirq_insn(_rs) \
-r_type_insn(0b0001000, 0, regnum_ ## _rs, 0b100, 0, 0b0001011)
+# #define picorv32_trigirq_insn(_rs) \
+# r_type_insn(0b0001000, 0, regnum_ ## _rs, 0b100, 0, 0b0001011)
 
 #define picorv32_timer_insn(_rd, _rs) \
 r_type_insn(0b0000101, 0, regnum_ ## _rs, 0b110, regnum_ ## _rd, 0b0001011)
 
-#define picorv32_disirq_insn() \
-r_type_insn(0b0000110, 0, 0, 0b000, 0, 0b0001011)
+# #define picorv32_disirq_insn() \
+# r_type_insn(0b0000110, 0, 0, 0b000, 0, 0b0001011)
 
-#define picorv32_enairq_insn() \
-r_type_insn(0b0000111, 0, 0, 0b000, 0, 0b0001011)
+# #define picorv32_enairq_insn() \
+# r_type_insn(0b0000111, 0, 0, 0b000, 0, 0b0001011)
diff --git a/fw/test/firmware.h b/fw/test/firmware.h
@@ -11,8 +11,17 @@
 #include <stdint.h>
 #include <stdbool.h>
 
+// mie, mip bits definition
+#define	M_IRQ_SOFTWARE						(1U << 3)
+#define	M_IRQ_TIMER							(1U << 7)
+#define	M_IRQ_EXTERNAL						(1U << 11)
+
+// start.S
+extern void clear_bits_mip(uint32_t val);
+extern void clear_bits_custom_irq_pend(uint32_t val);
+
 // irq.c
-uint32_t *irq(uint32_t *regs, uint32_t irqs);
+uint32_t *irq(uint32_t *regs, uint32_t mip, uint32_t irqs);
 
 // print.c
 void print_chr(char ch);

diff --git a/fw/test/irq.c b/fw/test/irq.c
@@ -7,7 +7,7 @@
 
 #include "firmware.h"
 
-uint32_t *irq(uint32_t *regs, uint32_t irqs)
+uint32_t *irq(uint32_t *regs, uint32_t mip, uint32_t irqs)
 {
 	static unsigned int ext_irq_4_count = 0;
 	static unsigned int ext_irq_5_count = 0;
@@ -32,21 +32,26 @@ uint32_t *irq(uint32_t *regs, uint32_t irqs)
 			print_str("\n");
 			__asm__ volatile ("ebreak");
 		}
+
+		clear_bits_custom_irq_pend(6);
 	}
 
 	if ((irqs & (1<<4)) != 0) {
 		ext_irq_4_count++;
 		// print_str("[EXT-IRQ-4]");
+		clear_bits_custom_irq_pend(1<<4);
 	}
 
 	if ((irqs & (1<<5)) != 0) {
 		ext_irq_5_count++;
 		// print_str("[EXT-IRQ-5]");
+		clear_bits_custom_irq_pend(1<<5);
 	}
 
-	if ((irqs & 1) != 0) {
+	if ((mip & M_IRQ_TIMER) != 0) {
 		timer_irq_count++;
 		// print_str("[TIMER-IRQ]");
+		clear_bits_mip(M_IRQ_TIMER);
 	}
 
 	if ((irqs & 6) != 0)
@@ -132,6 +137,8 @@ uint32_t *irq(uint32_t *regs, uint32_t irqs)
 		print_dec(timer_irq_count);
 		print_str("\n");
 
+		clear_bits_custom_irq_pend(6);
+
 		__asm__ volatile ("ebreak");
 	}