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Merge tag 'clk-imx-6.2' of git://git.kernel.org/pub/scm/linux/kernel/…
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…git/abelvesa/linux into clk-imx

Pull i.MX clk driver updates from Abel Vesa:

 - Fix parent for FlexSPI clock for i.MX93
 - Add USB suspend clock on i.MX8MP
 - Unmap anatop base on error for i.MX93 driver
 - Change enet clock parent to wakeup_axi_root for i.MX93
 - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
 - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
 - Add 320MHz and 640MHz entries to PLL146x
 - Add audio shared gate and SAI clocks for i.MX8MP

* tag 'clk-imx-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
  clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()
  clk: imx8mn: fix imx8mn_enet_phy_sels clocks list
  clk: imx8mn: fix imx8mn_sai2_sels clocks list
  clk: imx: rename video_pll1 to video_pll
  clk: imx: replace osc_hdmi with dummy
  clk: imx8mn: rename vpu_pll to m7_alt_pll
  clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gate
  clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets
  clk: imx8mp: Add audio shared gate
  dt-bindings: clock: imx8mp: Add ids for the audio shared gate
  clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146x
  clk: imx93: keep sys ctr clock always on
  clk: imx: keep hsio bus clock always on
  clk: imx93: drop tpm1/3, lpit1/2 clk
  dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
  clk: imx93: correct enet clock
  clk: imx93: unmap anatop base in error handling path
  clk: imx: imx8mp: add shared clk gate for usb suspend clk
  dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
  clk: imx93: correct the flexspi1 clock setting
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@bebarino
bebarino committed Nov 29, 2022
2 parents 9abf231 + 8178e24 commit 5595eab
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Showing 17 changed files with 178 additions and 147 deletions.
8 changes: 4 additions & 4 deletions drivers/clk/imx/clk-imx6sll.c
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Expand Up @@ -91,12 +91,12 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node)

hws[IMX6SLL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);

hws[IMX6SLL_CLK_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
hws[IMX6SLL_CLK_OSC] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
hws[IMX6SLL_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");
hws[IMX6SLL_CLK_OSC] = imx_get_clk_hw_by_name(ccm_node, "osc");

/* ipp_di clock is external input */
hws[IMX6SLL_CLK_IPP_DI0] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di0");
hws[IMX6SLL_CLK_IPP_DI1] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di1");
hws[IMX6SLL_CLK_IPP_DI0] = imx_get_clk_hw_by_name(ccm_node, "ipp_di0");
hws[IMX6SLL_CLK_IPP_DI1] = imx_get_clk_hw_by_name(ccm_node, "ipp_di1");

np = of_find_compatible_node(NULL, NULL, "fsl,imx6sll-anatop");
base = of_iomap(np, 0);
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12 changes: 6 additions & 6 deletions drivers/clk/imx/clk-imx6sx.c
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Expand Up @@ -132,16 +132,16 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)

hws[IMX6SX_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);

hws[IMX6SX_CLK_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
hws[IMX6SX_CLK_OSC] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
hws[IMX6SX_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");
hws[IMX6SX_CLK_OSC] = imx_get_clk_hw_by_name(ccm_node, "osc");

/* ipp_di clock is external input */
hws[IMX6SX_CLK_IPP_DI0] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di0");
hws[IMX6SX_CLK_IPP_DI1] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di1");
hws[IMX6SX_CLK_IPP_DI0] = imx_get_clk_hw_by_name(ccm_node, "ipp_di0");
hws[IMX6SX_CLK_IPP_DI1] = imx_get_clk_hw_by_name(ccm_node, "ipp_di1");

/* Clock source from external clock via CLK1/2 PAD */
hws[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clk_hw(ccm_node, "anaclk1");
hws[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clk_hw(ccm_node, "anaclk2");
hws[IMX6SX_CLK_ANACLK1] = imx_get_clk_hw_by_name(ccm_node, "anaclk1");
hws[IMX6SX_CLK_ANACLK2] = imx_get_clk_hw_by_name(ccm_node, "anaclk2");

np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
base = of_iomap(np, 0);
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8 changes: 4 additions & 4 deletions drivers/clk/imx/clk-imx6ul.c
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Expand Up @@ -126,12 +126,12 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)

hws[IMX6UL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);

hws[IMX6UL_CLK_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
hws[IMX6UL_CLK_OSC] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
hws[IMX6UL_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");
hws[IMX6UL_CLK_OSC] = imx_get_clk_hw_by_name(ccm_node, "osc");

/* ipp_di clock is external input */
hws[IMX6UL_CLK_IPP_DI0] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di0");
hws[IMX6UL_CLK_IPP_DI1] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di1");
hws[IMX6UL_CLK_IPP_DI0] = imx_get_clk_hw_by_name(ccm_node, "ipp_di0");
hws[IMX6UL_CLK_IPP_DI1] = imx_get_clk_hw_by_name(ccm_node, "ipp_di1");

np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-anatop");
base = of_iomap(np, 0);
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4 changes: 2 additions & 2 deletions drivers/clk/imx/clk-imx7d.c
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Expand Up @@ -391,8 +391,8 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
hws = clk_hw_data->hws;

hws[IMX7D_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
hws[IMX7D_OSC_24M_CLK] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
hws[IMX7D_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
hws[IMX7D_OSC_24M_CLK] = imx_get_clk_hw_by_name(ccm_node, "osc");
hws[IMX7D_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");

np = of_find_compatible_node(NULL, NULL, "fsl,imx7d-anatop");
base = of_iomap(np, 0);
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10 changes: 5 additions & 5 deletions drivers/clk/imx/clk-imx7ulp.c
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Expand Up @@ -59,11 +59,11 @@ static void __init imx7ulp_clk_scg1_init(struct device_node *np)

hws[IMX7ULP_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);

hws[IMX7ULP_CLK_ROSC] = imx_obtain_fixed_clk_hw(np, "rosc");
hws[IMX7ULP_CLK_SOSC] = imx_obtain_fixed_clk_hw(np, "sosc");
hws[IMX7ULP_CLK_SIRC] = imx_obtain_fixed_clk_hw(np, "sirc");
hws[IMX7ULP_CLK_FIRC] = imx_obtain_fixed_clk_hw(np, "firc");
hws[IMX7ULP_CLK_UPLL] = imx_obtain_fixed_clk_hw(np, "upll");
hws[IMX7ULP_CLK_ROSC] = imx_get_clk_hw_by_name(np, "rosc");
hws[IMX7ULP_CLK_SOSC] = imx_get_clk_hw_by_name(np, "sosc");
hws[IMX7ULP_CLK_SIRC] = imx_get_clk_hw_by_name(np, "sirc");
hws[IMX7ULP_CLK_FIRC] = imx_get_clk_hw_by_name(np, "firc");
hws[IMX7ULP_CLK_UPLL] = imx_get_clk_hw_by_name(np, "upll");

/* SCG1 */
base = of_iomap(np, 0);
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12 changes: 6 additions & 6 deletions drivers/clk/imx/clk-imx8mm.c
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Expand Up @@ -312,12 +312,12 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
hws = clk_hw_data->hws;

hws[IMX8MM_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
hws[IMX8MM_CLK_24M] = imx_obtain_fixed_clk_hw(np, "osc_24m");
hws[IMX8MM_CLK_32K] = imx_obtain_fixed_clk_hw(np, "osc_32k");
hws[IMX8MM_CLK_EXT1] = imx_obtain_fixed_clk_hw(np, "clk_ext1");
hws[IMX8MM_CLK_EXT2] = imx_obtain_fixed_clk_hw(np, "clk_ext2");
hws[IMX8MM_CLK_EXT3] = imx_obtain_fixed_clk_hw(np, "clk_ext3");
hws[IMX8MM_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
hws[IMX8MM_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m");
hws[IMX8MM_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k");
hws[IMX8MM_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
hws[IMX8MM_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2");
hws[IMX8MM_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3");
hws[IMX8MM_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");

np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop");
base = of_iomap(np, 0);
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