Arm64/Sve: Handle ConvertTo* APIs properly (dotnet#103876)

* Handle ConvertTo* APIs properly * add missing default * Update src/coreclr/jit/lowerarmarch.cpp Co-authored-by: Aman Khalid <amankhalid@microsoft.com> * Update src/coreclr/jit/lowerarmarch.cpp Co-authored-by: Aman Khalid <amankhalid@microsoft.com> --------- Co-authored-by: Aman Khalid <amankhalid@microsoft.com>
hwoodiwiss · Jun 24, 2024 · b112eac · b112eac
1 parent 8b6acb2
commit b112eac
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Showing 3 changed files with 54 additions and 7 deletions.
diff --git a/src/coreclr/jit/hwintrinsic.cpp b/src/coreclr/jit/hwintrinsic.cpp
@@ -1477,6 +1477,18 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic        intrinsic,
                         break;
                     }
                 }
+#elif defined(TARGET_ARM64)
+                switch (intrinsic)
+                {
+                    case NI_Sve_ConvertToInt32:
+                    case NI_Sve_ConvertToUInt32:
+                        // Save the base type of return SIMD. It is used to contain this intrinsic inside
+                        // ConditionalSelect.
+                        retNode->AsHWIntrinsic()->SetAuxiliaryJitType(getBaseJitTypeOfSIMDType(sig->retTypeSigClass));
+                        break;
+                    default:
+                        break;
+                }
 #endif // TARGET_XARCH
 
                 break;

diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp
@@ -490,6 +490,20 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
                 {
                     assert(!instrIsRMW);
 
+                    // Special handling for ConvertTo* APIs
+                    // Just need to change the opt here.
+                    switch (intrinEmbMask.id)
+                    {
+                        case NI_Sve_ConvertToInt32:
+                        case NI_Sve_ConvertToUInt32:
+                        {
+                            opt = intrinEmbMask.baseType == TYP_DOUBLE ? INS_OPTS_D_TO_S : INS_OPTS_SCALABLE_S;
+                            break;
+                        }
+                        default:
+                            break;
+                    }
+
                     if (targetReg != falseReg)
                     {
                         // If targetReg is not the same as `falseReg` then need to move

diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp
@@ -3347,14 +3347,35 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
                 // Handle op2
                 if (op2->OperIsHWIntrinsic())
                 {
-                    uint32_t maskSize = genTypeSize(node->GetSimdBaseType());
-                    uint32_t operSize = genTypeSize(op2->AsHWIntrinsic()->GetSimdBaseType());
-
-                    if ((maskSize == operSize) && IsInvariantInRange(op2, node) &&
-                        op2->isEmbeddedMaskingCompatibleHWIntrinsic())
+                    if (IsInvariantInRange(op2, node) && op2->isEmbeddedMaskingCompatibleHWIntrinsic())
                     {
-                        MakeSrcContained(node, op2);
-                        op2->MakeEmbMaskOp();
+                        uint32_t maskSize = genTypeSize(node->GetSimdBaseType());
+                        uint32_t operSize = genTypeSize(op2->AsHWIntrinsic()->GetSimdBaseType());
+                        if (maskSize == operSize)
+                        {
+                            // If the size of baseType of operation matches that of maskType, then contain
+                            // the operation
+                            MakeSrcContained(node, op2);
+                            op2->MakeEmbMaskOp();
+                        }
+                        else
+                        {
+                            // Else check if this operation has an auxiliary type that matches the
+                            // mask size.
+                            GenTreeHWIntrinsic* embOp = op2->AsHWIntrinsic();
+
+                            // For now, make sure that we get here only for intrinsics that we are
+                            // sure about to rely on auxiliary type's size.
+                            assert((embOp->GetHWIntrinsicId() == NI_Sve_ConvertToInt32) ||
+                                   (embOp->GetHWIntrinsicId() == NI_Sve_ConvertToUInt32));
+
+                            uint32_t auxSize = genTypeSize(embOp->GetAuxiliaryType());
+                            if (maskSize == auxSize)
+                            {
+                                MakeSrcContained(node, op2);
+                                op2->MakeEmbMaskOp();
+                            }
+                        }
                     }
                 }