Merge pull request ARMmbed#767 from ohagendorf/nucleo_disco_coide

STM32xxx: CoIDE/gcc_arm exporter and startup_stm32xx update
ksekimoto · Dec 8, 2014 · a17c1dd · a17c1dd
2 parents e815194 + f762a60
commit a17c1dd
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diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_DISCO_F100RB/TOOLCHAIN_GCC_ARM/STM32F100.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_DISCO_F100RB/TOOLCHAIN_GCC_ARM/STM32F100.ld
@@ -4,7 +4,7 @@
 MEMORY
 { 
   FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128k
-  RAM (rwx) : ORIGIN = 0x20000188, LENGTH = 0x2000-0x188 
+  RAM (rwx) : ORIGIN = 0x200001D0, LENGTH = 8K - 0x1D0 
 }
 
 /* Linker script to place sections and symbol values. Should be used together

diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_GCC_ARM/STM32F10X.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_GCC_ARM/STM32F10X.ld
@@ -4,7 +4,7 @@
 MEMORY
 {
   FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
-  RAM (rwx) : ORIGIN =  0x200000EC, LENGTH = 0x5000-0xEC /* First 236 bytes (0xEC) of RAM are reserved for ISR Vectors */
+  RAM (rwx) : ORIGIN =  0x200000EC, LENGTH = 20K - 0xEC /* First 236 bytes (0xEC) of RAM are reserved for ISR Vectors */
 }
 /* Linker script to place sections and symbol values. Should be used together
  * with other linker script that defines memory regions FLASH and RAM.

diff --git a/...is/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_GCC_ARM/startup_stm32f030x8.s b/...is/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_GCC_ARM/startup_stm32f030x8.s
@@ -100,10 +100,9 @@ LoopFillZerobss:
 /* Call the clock system intitialization function.*/
   bl  SystemInit
 /* Call static constructors */
-//  bl __libc_init_array
+  bl __libc_init_array
 /* Call the application's entry point.*/
-//  bl main
-  bl _start
+  bl main
 
 LoopForever:
     b LoopForever

diff --git a/...is/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/TOOLCHAIN_GCC_ARM/startup_stm32f072xb.s b/...is/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/TOOLCHAIN_GCC_ARM/startup_stm32f072xb.s
@@ -100,10 +100,9 @@ LoopFillZerobss:
 /* Call the clock system intitialization function.*/
   bl  SystemInit
 /* Call static constructors */
-//  bl __libc_init_array
+  bl __libc_init_array
 /* Call the application's entry point.*/
-//  bl main
-  bl _start
+  bl main
 
 LoopForever:
     b LoopForever

diff --git a/...3VC/TOOLCHAIN_GCC_ARM/startup_stm32f30x.s → ...C/TOOLCHAIN_GCC_ARM/startup_stm32f303xc.s b/...3VC/TOOLCHAIN_GCC_ARM/startup_stm32f30x.s → ...C/TOOLCHAIN_GCC_ARM/startup_stm32f303xc.s
@@ -1,25 +1,24 @@
 /**
   ******************************************************************************
-  * @file      startup_stm32f30x.s
+  * @file      startup_stm32f303xc.s
   * @author    MCD Application Team
-  * @version   V1.0.0
-  * @date      04-Spetember-2012
-  * @brief     STM32F4xx Devices vector table for RIDE7 toolchain. 
+  * @version   V1.1.0
+  * @date      12-Sept-2014
+  * @brief     STM32F303xB/STM32F303xC devices vector table for Atollic 
+  *            TrueSTUDIO toolchain.
   *            This module performs:
   *                - Set the initial SP
   *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system and the external SRAM mounted on 
-  *                  STM3230C-EVAL board to be used as data memory (optional, 
-  *                  to be enabled by user)
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system  
   *                - Branches to main in the C library (which eventually
   *                  calls main()).
   *            After Reset the Cortex-M4 processor is in Thread mode,
   *            priority is Privileged, and the Stack is set to Main.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
   *
   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
   * You may not use this file except in compliance with the License.
@@ -35,101 +34,108 @@
   *
   ******************************************************************************
   */
-    
+
   .syntax unified
-  .cpu cortex-m4
-  .fpu softvfp
-  .thumb
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
 
-.global  g_pfnVectors
-.global  Default_Handler
+.global	g_pfnVectors
+.global	Default_Handler
 
-/* start address for the initialization values of the .data section. 
+/* start address for the initialization values of the .data section.
 defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */  
-.word  _sdata
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
 /* end address for the .data section. defined in linker script */
-.word  _edata
+.word	_edata
 /* start address for the .bss section. defined in linker script */
-.word  _sbss
+.word	_sbss
 /* end address for the .bss section. defined in linker script */
-.word  _ebss
-/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
+.word	_ebss
 
+.equ  BootRAM,        0xF1E0F85F
 /**
  * @brief  This is the code that gets called when the processor first
  *          starts execution following a reset event. Only the absolutely
  *          necessary set is performed, after which the application
- *          supplied main() routine is called. 
+ *          supplied main() routine is called.
  * @param  None
  * @retval : None
 */
 
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   sp, =_estack    /* Atollic update: set stack pointer */
 
-/* Copy the data segment initializers from flash to SRAM */  
-  movs  r1, #0
-  b  LoopCopyDataInit
+/* Copy the data segment initializers from flash to SRAM */
+  movs	r1, #0
+  b	LoopCopyDataInit
 
 CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-    
+	ldr	r3, =_sidata
+	ldr	r3, [r3, r1]
+	str	r3, [r0, r1]
+	adds	r1, r1, #4
+
 LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */  
+	ldr	r0, =_sdata
+	ldr	r3, =_edata
+	adds	r2, r0, r1
+	cmp	r2, r3
+	bcc	CopyDataInit
+	ldr	r2, =_sbss
+	b	LoopFillZerobss
+/* Zero fill the bss segment. */
 FillZerobss:
-  movs  r3, #0
-  str  r3, [r2], #4
-    
+	movs	r3, #0
+	str	r3, [r2], #4
+
 LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
+	ldr	r3, = _ebss
+	cmp	r2, r3
+	bcc	FillZerobss
 
 /* Call the clock system intitialization function.*/
-  bl  SystemInit   
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
 /* Call the application's entry point.*/
-  bl    _start
-  bx  lr    
-.size  Reset_Handler, .-Reset_Handler
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
 
 /**
- * @brief  This is the code that gets called when the processor receives an 
+ * @brief  This is the code that gets called when the processor receives an
  *         unexpected interrupt.  This simply enters an infinite loop, preserving
  *         the system state for examination by a debugger.
- * @param  None     
- * @retval None       
+ *
+ * @param  None
+ * @retval : None
 */
-    .section  .text.Default_Handler,"ax",%progbits
+    .section	.text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
 /******************************************************************************
 *
-* The minimal vector table for a Cortex M3. Note that the proper constructs
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
 * must be placed on this to ensure that it ends up at physical address
 * 0x0000.0000.
-* 
-*******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-    
-    
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+	.size	g_pfnVectors, .-g_pfnVectors
+
+
 g_pfnVectors:
 	.word	_estack
 	.word	Reset_Handler
@@ -149,13 +155,13 @@ g_pfnVectors:
 	.word	SysTick_Handler
 	.word	WWDG_IRQHandler
 	.word	PVD_IRQHandler
-	.word	TAMPER_STAMP_IRQHandler
+	.word	TAMP_STAMP_IRQHandler
 	.word	RTC_WKUP_IRQHandler
 	.word	FLASH_IRQHandler
 	.word	RCC_IRQHandler
 	.word	EXTI0_IRQHandler
 	.word	EXTI1_IRQHandler
-	.word	EXTI2_TS_IRQHandler
+	.word	EXTI2_TSC_IRQHandler
 	.word	EXTI3_IRQHandler
 	.word	EXTI4_IRQHandler
 	.word	DMA1_Channel1_IRQHandler
@@ -166,10 +172,10 @@ g_pfnVectors:
 	.word	DMA1_Channel6_IRQHandler
 	.word	DMA1_Channel7_IRQHandler
 	.word	ADC1_2_IRQHandler
-	.word	USB_HP_CAN1_TX_IRQHandler
-	.word	USB_LP_CAN1_RX0_IRQHandler
-	.word	CAN1_RX1_IRQHandler
-	.word	CAN1_SCE_IRQHandler
+	.word	USB_HP_CAN_TX_IRQHandler
+	.word	USB_LP_CAN_RX0_IRQHandler
+	.word	CAN_RX1_IRQHandler
+	.word	CAN_SCE_IRQHandler
 	.word	EXTI9_5_IRQHandler
 	.word	TIM1_BRK_TIM15_IRQHandler
 	.word	TIM1_UP_TIM16_IRQHandler
@@ -271,8 +277,8 @@ g_pfnVectors:
 	.weak	PVD_IRQHandler
 	.thumb_set PVD_IRQHandler,Default_Handler
 
-	.weak	TAMPER_STAMP_IRQHandler
-	.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
+	.weak	TAMP_STAMP_IRQHandler
+	.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
 
 	.weak	RTC_WKUP_IRQHandler
 	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
@@ -289,8 +295,8 @@ g_pfnVectors:
 	.weak	EXTI1_IRQHandler
 	.thumb_set EXTI1_IRQHandler,Default_Handler
 
-	.weak	EXTI2_TS_IRQHandler
-	.thumb_set EXTI2_TS_IRQHandler,Default_Handler
+	.weak	EXTI2_TSC_IRQHandler
+	.thumb_set EXTI2_TSC_IRQHandler,Default_Handler
 
 	.weak	EXTI3_IRQHandler
 	.thumb_set EXTI3_IRQHandler,Default_Handler
@@ -322,17 +328,17 @@ g_pfnVectors:
 	.weak	ADC1_2_IRQHandler
 	.thumb_set ADC1_2_IRQHandler,Default_Handler
 
-	.weak	USB_HP_CAN1_TX_IRQHandler
-	.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
+	.weak	USB_HP_CAN_TX_IRQHandler
+	.thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler
 
-	.weak	USB_LP_CAN1_RX0_IRQHandler
-	.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
+	.weak	USB_LP_CAN_RX0_IRQHandler
+	.thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler
 
-	.weak	CAN1_RX1_IRQHandler
-	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
+	.weak	CAN_RX1_IRQHandler
+	.thumb_set CAN_RX1_IRQHandler,Default_Handler
 
-	.weak	CAN1_SCE_IRQHandler
-	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
+	.weak	CAN_SCE_IRQHandler
+	.thumb_set CAN_SCE_IRQHandler,Default_Handler
 
 	.weak	EXTI9_5_IRQHandler
 	.thumb_set EXTI9_5_IRQHandler,Default_Handler