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1. verilog_tutorial_edge_count verilog_tutorial_edge_count Public

   Forked from mbstrange2/verilog_tutorial_edge_count

   Intro Module for getting a feel for verilog

   SystemVerilog 2

2. OpenRRAM OpenRRAM Public

   Forked from VLSIDA/OpenRAM

   An open-source resistive random access memory (RRAM) compiler based on OpenRAM

   Assembly

3. NEM-Relay-CAD NEM-Relay-CAD Public

   Forked from akashlevy/NEM-Relay-CAD

   Parametric NEM relay design with layout generation (KLayout: GDSII, DXF), FEM (Ansys/COMSOL), SPICE models, Liberty models, and more

   Perl

4. NEM-Relay-CGRA NEM-Relay-CGRA Public

   Forked from akashlevy/NEM-Relay-CGRA

   Jade CGRA using NEM relay interconnect fabric. Related repositories: NEM-Relay-CGRA-Flow, NEM-Relay-CAD

   Verilog

5. mflowgen mflowgen Public

   Forked from mflowgen/mflowgen

   mflowgen -- A Modular ASIC/FPGA Flow Generator

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6. freepdk-45nm freepdk-45nm Public

   Forked from mflowgen/freepdk-45nm

   ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen

   Verilog