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Free collection of hardware modules written in Verilog for FPGAs and embedded systems.
Lightning-fast and Powerful Code Editor written in Rust
A complete harfbuzz's shaping algorithm port to Rust
VS Code based debugger for hardware designs in Amaranth or Verilog
Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
Functional verification project for the CORE-V family of RISC-V cores.
RSD: RISC-V Out-of-Order Superscalar Processor
Wasm Analysis Framework For Lightweight Experiments
A Linux-capable RISC-V multicore for and by the world
Working Draft of the RISC-V J Extension Specification
Common SystemVerilog components
BaseJump STL: A Standard Template Library for SystemVerilog
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
A minimal GPU design in Verilog to learn how GPUs work from the ground up
An open source GPU based off of the AMD Southern Islands ISA.
A lightweight, memory-protected, message-passing kernel for deeply embedded systems.
A secure embedded operating system for microcontrollers
A modern supercompiler for call-by-value functional languages
GPGPU supporting RISCV-V, developed with verilog HDL
RISC-V Debug Support for our PULP RISC-V Cores
Working Draft of the RISC-V Debug Specification Standard
😎 Curated list of awesome resources on Compilers, Interpreters and Runtimes
a language for fast, portable data-parallel computation
Keystone assembler framework: Core (Arm, Arm64, Hexagon, Mips, PowerPC, Sparc, SystemZ & X86) + bindings
