LVGL ported to Emscripten to be converted to JavaScript

C++/SDL2/OpenGLES2 samples running in the browser via Emscripten

Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems

Random instruction generator for RISC-V processor verification

RISC-V simulator for x86-64

Simple machine mode program to probe RISC-V control and status registers

Embedded graphics library to create beautiful UIs for any MCU, MPU and display type.

Setup scripts and files needed to compile CoreMark on RISC-V

This repository contains data, codes and presentation files which are used in CDAC Machine and Deep learning workshop conducted by CEN, Amrita.

Aadhaar Authentication OTP 1.6 and Auth 2.0 support

A set of scripts to build a (somewhat) working Debian image for RISC-V.

Embedded Linux distribution optimized for product development (based on OE/Yocto)

RISC-V Buildroot

Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at https://gitlab.com/buildroot.org/buildroot/. Do not open i…

RISC-V Linux Port

PKU computer organization and architecture RISC-V Simulator LAB

RISC-V Instruction Set Metadata

busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.

Toy RISC-V emulator

QEMU with RISC-V (RV64G, RV32G) Emulation Support

Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or…

Formal specification of RISC-V Instruction Set

OpenEmbedded/Yocto layer for RISC-V Architecture

Mongoose OS - an IoT Firmware Development Framework. Supported microcontrollers: ESP32, ESP8266, CC3220, CC3200, STM32F4, STM32L4, STM32F7. Amazon AWS IoT, Microsoft Azure, Google IoT Core integrat…

JavaScript RISC-V ISA Simulator. Boots linux in a web-browser.

Linux kernel source tree