CSR dump

[viv-eth]

This utility was inspired by MemPool to enable single cycle printf in RTL simulation.
This will not work on the actual hardware, but aids debugging.

You have the option to interpret the register values as either 32-bit float values or 32-bit unsigned integers. Depending on what kind of data you want to display, use the dump_float or dump_uint utility, respectively.

As an example, define dump_float(<name>, <csr_reg_ID> at the beginning of the file you want to debug. Afterward, you can dump the values to the output of the RTL simulation by calling dump_<name>(<value>).

You have to be careful when selecting the csr_reg_ID as it must not be an invalid register ID.

[fischeti]

Otherwise LGTM. Thanks!

[colluca]

I think before we merge this we should discuss the purpose of it. I don't see a reason why we need this or why we should prefer this over the existing printf implementation.

[fischeti]

I think before we merge this we should discuss the purpose of it. I don't see a reason why we need this or why we should prefer this over the existing printf implementation.

I kind of like the feature. Mostly because it speeds up debugging of RTL simulations. A single printf takes 100x of cycles and normally takes much longer than the actual computation, which is why I avoided it most of the time. The alternative is to look at the traces, but this is always more cumbersome to debug. So I think this feature would be quite handy imo