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v2.1.1a

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topology1: sof-icl-rt711-rt1308-rt715-hdmi: fix typo

Signed-off-by: Libin Yang <libin.yang@intel.com>
(cherry picked from commit fa8570d)

v2.2

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xtensa-build-zephyr.py: pass SOF firmware file version string to rimage

Extract SOF firmware file version string major.minor.micro from the
generated sof_version.h, and pass the version string to rimage in the
signing phase. So rimage can write the version info to the firmware
manifest headers for cAVS platforms.

Signed-off-by: mengdonglin <mengdong.lin@intel.com>
(cherry picked from commit 55d8d90)

v2.2-rc1

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xtensa-build-zephyr.py: pass SOF firmware file version string to rimage

Extract SOF firmware file version string major.minor.micro from the
generated sof_version.h, and pass the version string to rimage in the
signing phase. So rimage can write the version info to the firmware
manifest headers for cAVS platforms.

Signed-off-by: mengdonglin <mengdong.lin@intel.com>
(cherry picked from commit 55d8d90)

releases/rpl/v1.0

Toggle releases/rpl/v1.0's commit message
xtensa-build-zephyr.py: pass SOF firmware file version string to rimage

Extract SOF firmware file version string major.minor.micro from the
generated sof_version.h, and pass the version string to rimage in the
signing phase. So rimage can write the version info to the firmware
manifest headers for cAVS platforms.

Signed-off-by: mengdonglin <mengdong.lin@intel.com>
(cherry picked from commit 55d8d90)

v2.1.1

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audio: volume: initialize variables before using

initialize variables before using and finalize the
output align register to sink address for aligned
store.

Signed-off-by: Andrula Song <xiaoyuan.song@intel.com>

v1.9.3-tplg2

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test: topology: fix build with latest alsa-lib

Remove the extra space to make the topology build with upstream
alsa-lib.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
(cherry picked from commit fcfd5d6)

v1.9.3-tplg1

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topology1: CMakefile: add sof-adl-rt711-l2-rt1316-l01

Add sof-adl-rt711-l2-rt1316-l01 support. This tplg doesn't include any
local MICs.

Signed-off-by: Libin Yang <libin.yang@intel.com>

v2.1

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xtensa-build-all: add a separate target for JSL

Use intel_adsp_cavs20_jsl Zephyr board when building for
Intel Jasper Lake.

BugLink: thesofproject#4539
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
(cherry picked from commit 6d0ecc3)

v2.1-rc1

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xtensa-build-zephyr.sh: switch Zephyr default to sof/stable-v2.1

Supersedes thesofproject#5519

Signed-off-by: Marc Herbert <marc.herbert@intel.com>

v2.0

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scrips: xtensa-build-zephyr: fix Zephyr commit for release

Use a fixed Zephyr mainline commit to build binaries in the SOF2.0
release branch. This Zephyr commit was tested in 2021-12-03 daily
test plans.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>