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A raw silicon (CMOS) implementation of a SHA256 module

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SHA256 Hardware Hasher

A silicon(CMOS) implementation of the SHA256 hashing algorithm.

(c) 2018 Architects: Duane Bailey, Bryan Bailey, Braden H. Becker, Kevin Chang, John E. Ferguson, Jason S. Hansel, Tanner M. Love, Nebiyou Y. Metaferia, Nathaniel M. Perry, Riwaz Poudyal, and Alexander F. Smith-Bove

The project is implemented using the (free, os) Electric VLSI Design System (http://www.staticfreesoft.com/)

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A raw silicon (CMOS) implementation of a SHA256 module

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