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Merge pull request #512 from newAM/probe-rs
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probe-run -> probe-rs
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newAM authored Feb 10, 2024
2 parents f47ec95 + d401bb2 commit 6df9a38
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Showing 8 changed files with 20 additions and 61 deletions.
12 changes: 6 additions & 6 deletions .github/workflows/on-target.yml
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ jobs:
- name: Build testsuite
env:
RUSTFLAGS: -C link-arg=-Tlink.x -D warnings
run: cargo build -p testsuite --target thumbv7m-none-eabi --features semihosting,cortex-m/critical-section-single-core
run: cargo build -p testsuite --target thumbv7m-none-eabi
- name: Install QEMU
run: sudo apt-get update && sudo apt-get install qemu qemu-system-arm
- name: Run testsuite
Expand All @@ -47,7 +47,7 @@ jobs:
- name: Build testsuite
env:
RUSTFLAGS: -C link-arg=-Tlink.x -D warnings
run: cargo build -p testsuite --target thumbv6m-none-eabi --features rtt,cortex-m/critical-section-single-core
run: cargo build -p testsuite --target thumbv6m-none-eabi --features rtt
- name: Upload testsuite binaries
uses: actions/upload-artifact@v4
with:
Expand All @@ -62,18 +62,18 @@ jobs:
- hil-compile-rtt
steps:
- uses: actions/checkout@v4
- name: Display probe-run version
run: probe-run --version
- name: Display probe-rs version
run: probe-rs --version
- name: List probes
run: probe-run --list-probes
run: probe-rs list
- uses: actions/download-artifact@v4
with:
name: testsuite-bin
path: testsuite-bin
- name: Run on-target tests
timeout-minutes: 5
run: |
probe-run \
probe-rs run \
--chip STM32F070RBTx \
--connect-under-reset \
testsuite-bin/testsuite
13 changes: 3 additions & 10 deletions testsuite/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,18 +7,11 @@ version = "0.1.0"

[features]
rtt = ["rtt-target", "minitest/rtt"]
semihosting = ["cortex-m-semihosting", "minitest/semihosting"]

[dependencies]
cortex-m-rt.path = "../cortex-m-rt"
cortex-m.path = "../cortex-m"
cortex-m = { path = "../cortex-m", features = ["critical-section-single-core"] }
minitest.path = "minitest"
critical-section = "1.0.0"

[dependencies.rtt-target]
version = "0.3.1"
optional = true

[dependencies.cortex-m-semihosting]
path = "../cortex-m-semihosting"
optional = true
cortex-m-semihosting.path = "../cortex-m-semihosting"
rtt-target = { version = "0.5.0", optional = true }
10 changes: 5 additions & 5 deletions testsuite/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ Assuming you are at the root of the repository you can build like this:

```console
$ cd testsuite
$ cargo build --features semihosting
$ cargo build
Compiling testsuite v0.1.0 (cortex-m/testsuite)
Finished dev [unoptimized + debuginfo] target(s) in 0.08
```
Expand All @@ -27,7 +27,7 @@ For more information on QEMU reference the QEMU section in [The Embedded Rust Bo

```console
$ cd testsuite
$ cargo run --features semihosting
$ cargo run
Finished dev [unoptimized + debuginfo] target(s) in 0.01s
Running `qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel /cortex-m/target/thumbv7m-none-eabi/debug/testsuite`
Timer with period zero, disabling
Expand All @@ -40,10 +40,10 @@ all tests passed!

No implementation-specific features are tested right now; any physical `thumbv7m` target should work.

Tests are executed with [probe-run](https://github.com/knurling-rs/probe-run).
Tests are executed with [probe-rs](https://github.com/probe-rs/probe-rs).

* Update `memory.x` in the root of the repository to match your target memory layout.
* Change the `probe-run` chip argument to match your chip, supported chips can be found with `probe-run --list-chips`
* Change the `probe-rs` chip argument to match your chip, supported chips can be found with `probe-rs chip list`
* Change the target to match your CPU

```console
Expand All @@ -53,7 +53,7 @@ $ cargo build --target thumbv7em-none-eabi --features rtt
Compiling minitest v0.1.0 (/cortex-m/testsuite/minitest)
Compiling testsuite v0.1.0 (/cortex-m/testsuite)
Finished dev [unoptimized + debuginfo] target(s) in 0.16s
$ probe-run --chip STM32WLE5JCIx --connect-under-reset ../target/thumbv7em-none-eabi/debug/testsuite
$ probe-rs run --chip STM32WLE5JCIx --connect-under-reset ../target/thumbv7em-none-eabi/debug/testsuite
(HOST) INFO flashing program (19 pages / 19.00 KiB)
(HOST) INFO success!
────────────────────────────────────────────────────────────────────────────────
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13 changes: 3 additions & 10 deletions testsuite/minitest/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -6,18 +6,11 @@ edition = "2018"
version = "0.1.0"

[features]
semihosting = ["cortex-m-semihosting", "minitest-macros/semihosting"]
rtt = ["rtt-target", "minitest-macros/rtt"]

[dependencies]
cortex-m.path = "../../cortex-m"
cortex-m-rt.path = "../../cortex-m-rt"
cortex-m-semihosting.path = "../../cortex-m-semihosting"
cortex-m.path = "../../cortex-m"
minitest-macros.path = "macros"

[dependencies.rtt-target]
version = "0.3.1"
optional = true

[dependencies.cortex-m-semihosting]
path = "../../cortex-m-semihosting"
optional = true
rtt-target = { version = "0.5.0", optional = true }
1 change: 0 additions & 1 deletion testsuite/minitest/macros/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@ version = "0.1.0"
proc-macro = true

[features]
semihosting = []
rtt = []

[dependencies]
Expand Down
17 changes: 1 addition & 16 deletions testsuite/minitest/macros/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -203,22 +203,7 @@ fn tests_impl(args: TokenStream, input: TokenStream) -> parse::Result<TokenStrea

#[cfg(feature = "rtt")]
let init_logging = quote!({
let channels = ::rtt_target::rtt_init! {
up: {
0: {
size: 256
mode: BlockIfFull
name: "minitest"
}
}
};
unsafe {
::rtt_target::set_print_channel_cs(
channels.up.0,
&((|arg, f| ::critical_section::with(|_| f(arg)))
as ::rtt_target::CriticalSectionFunc),
);
}
::rtt_target::rtt_init_print!();
});

#[cfg(not(feature = "rtt"))]
Expand Down
13 changes: 1 addition & 12 deletions testsuite/minitest/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -38,33 +38,22 @@ impl<T: Debug, E: Debug> TestOutcome for Result<T, E> {
macro_rules! log {
($s:literal $(, $x:expr)* $(,)?) => {
{
#[cfg(feature = "semihosting")]
#[cfg(not(feature = "rtt"))]
::cortex_m_semihosting::hprintln!($s $(, $x)*);
#[cfg(feature = "rtt")]
::rtt_target::rprintln!($s $(, $x)*);
#[cfg(not(any(feature = "semihosting", feature="rtt")))]
let _ = ($( & $x ),*);
}
};
}

/// Stop all tests without failure.
pub fn exit() -> ! {
#[cfg(feature = "rtt")]
cortex_m::asm::bkpt();
#[cfg(feature = "semihosting")]
cortex_m_semihosting::debug::exit(cortex_m_semihosting::debug::EXIT_SUCCESS);

unreachable!()
}

/// Stop all tests and report a failure.
pub fn fail() -> ! {
#[cfg(feature = "rtt")]
cortex_m::asm::udf();
#[cfg(feature = "semihosting")]
cortex_m_semihosting::debug::exit(cortex_m_semihosting::debug::EXIT_FAILURE);

#[cfg(not(feature = "rtt"))]
unreachable!()
}
2 changes: 1 addition & 1 deletion testsuite/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ mod tests {
}

#[test]
#[cfg(not(feature = "semihosting"))] // QEMU does not model the cycle counter
#[cfg(feature = "rtt")] // QEMU does not model the cycle counter
fn cycle_count(p: &mut cortex_m::Peripherals) {
#[cfg(not(armv6m))]
{
Expand Down

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