cortex-m-pac crate: standard traits and result handling for Cortex-M targets
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rursprung
reviewed
Oct 15, 2024
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| /// Represents error variants for the library. | ||
| #[derive(Clone, Copy, Debug, Eq, PartialEq)] | ||
| pub enum Error { |
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since core::error::Error is now stable it might make sense to impl it here? since you already have impl core::fmt::Display this should be straight-forward?
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Implementing |
rursprung
reviewed
Oct 16, 2024
Co-authored-by: Ralph Ursprung <39383228+rursprung@users.noreply.github.com>
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This PR ports some of the ongoing work in the RISC-V ecosystem to Cortex-M targets. Namely, I adapted the
riscv-paccrate to the newcortex-m-paccrate.The main purpose of this crate is to isolate fundamental traits and data types from potential breaking changes in
cortex-m. Namely, it currently contains traits for enumerating exceptions, interrupts, priorities, and core IDs. It also provides a basic fallible function support for Cortex-M devices, with an error enum with some of the most typical issues developers may face.Related PRs in RISC-V: #222 and #223
Related PRs in Cortex-M: #488
Once this is merged, I plan to continue porting new functionalities from RISC-V to Cortex-M (e.g., new syntax for interrupt and exception macros)