Support clobber_abi and vector registers (clobber-only) in PowerPC inline assembly

[taiki-e]

This supports clobber_abi which is one of the requirements of stabilization mentioned in #93335.

This basically does a similar thing I did in #130630 to implement clobber_abi for s390x, but for powerpc/powerpc64/powerpc64le.

• This also supports vector registers (as vreg) as clobber-only, which need to support clobbering of them to implement clobber_abi.
• vreg should be able to accept #[repr(simd)] types as input/output if the unstable altivec target feature is enabled, but core::arch::{powerpc,powerpc64} vector types, #[repr(simd)], and core::simd are all unstable, so the fact that this is currently a clobber-only should not be considered a blocker of clobber_abi implementation or stabilization. So I have not implemented it in this PR.
  • See Support #[repr(simd)] types in input/output of PowerPC inline assembly #131551 (which is based on this PR) for a PR to implement this.
  • (I'm not sticking to whether that PR should be a separate PR or part of this PR, so I can merge that PR into this PR if needed.)

Refs:

• PPC32 SysV: Section "Function Calling Sequence" in System V Application Binary Interface PowerPC Processor Supplement
• PPC64 ELFv1: Section 3.2 "Function Calling Sequence" in 64-bit PowerPC ELF Application Binary Interface Supplement
• PPC64 ELFv2: Section 2.2 "Function Calling Sequence" in 64-Bit ELF V2 ABI Specification
• AIX: Register usage and conventions, Special registers in the PowerPC®, AIX vector programming
• Register definition in LLVM: https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPCRegisterInfo.td#L189

If I understand the above four ABI documentations correctly, except for the 32-bit SysV's VR (Vector Registers) and 32-bit AIX (currently not supported by rustc)'s r13, there does not appear to be important differences in terms of implementing clobber_abi:

• The above four ABIs are consistent about FPR (0-13: volatile, 14-31: nonvolatile), CR (0-1,5-7: volatile, 2-4: nonvolatile), XER (volatile), and CTR (volatile).

• As for GPR, only the registers we are treating as reserved are slightly different

  • r0, r3-r12 are volatile
  • r1(sp, reserved), r14-31 are nonvolatile
  • r2(reserved) is TOC pointer in PPC64 ELF/AIX, system-reserved register in PPC32 SysV (AFAIK used as thread pointer in Linux/BSDs)
  • r13(reserved for non-32-bit-AIX) is thread pointer in PPC64 ELF, small data area pointer register in PPC32 SysV, "reserved under 64-bit environment; not restored across system calls¹" in AIX)

• As for FPSCR, volatile in PPC64 ELFv1/AIX, some fields are volatile only in certain situations (rest are volatile) in PPC32 SysV/PPC64 ELFv2.

• As for VR (Vector Registers), it is not mentioned in PPC32 SysV, v0-v19 are volatile in both in PPC64 ELF/AIX, v20-v31 are nonvolatile in PPC64 ELF, reserved or nonvolatile depending on the ABI (vec-extabi vs vec-default in LLVM, we are using vec-extabi) in AIX:

  When the default Vector enabled mode is used, these registers are reserved and must not be used.
  In the extended ABI vector enabled mode, these registers are nonvolatile and their values are preserved across function calls

  I left FIXME comment about PPC32 SysV and added ABI check for AIX.

• As for VRSAVE, it is not mentioned in PPC32 SysV, nonvolatile in PPC64 ELFv1, reserved in PPC64 ELFv2/AIX

• As for VSCR, it is not mentioned in PPC32 SysV/PPC64 ELFv1, some fields are volatile only in certain situations (rest are volatile) in PPC64 ELFv2, volatile in AIX

We are currently treating r1-r2, r13 (non-32-bit-AIX), r29-r31, LR, CTR, and VRSAVE as reserved.
We are currently not processing anything about FPSCR and VSCR, but I feel those are things that should be processed by preserves_flags rather than clobber_abi if we need to do something about them. (However, PPCRegisterInfo.td in LLVM does not seem to define anything about them.)

Replaces #111335 (closed) and #124279 (draft, no update for about 5 months at the time this PR was created), Closes #124279

cc @ecnelises @bzEq @lu-zero

r? @Amanieu

@rustbot label +O-PowerPC

Footnotes

1. callee-saved, according to LLVM and GCC. ↩

[rustbot]

Some changes occurred in compiler/rustc_codegen_gcc

cc @antoyo, @GuillaumeGomez

[taiki-e]

The reason I did not treat these as clobbered only on PPC64 is that the PPC32 ABI document I referenced was released at a time when Altivec/VMX did not exist, and I thought it might not reflect the final status of the PPC32 ABI.

In a similar case, the early ABI documents for s390x (e.g., the one mentioned here) do not mention vector registers, but the ABI documents since the addition of vector facility mention them and all are treated as volatile.

[taiki-e]

@ecnelises @bzEq: Is the default in Rust the default Vector enabled mode, as the name implies? Also, is there a way provided for the compiler to understand the current mode?

(If the first is yes and the second is no, it would be sufficient to simply reject the use of v20-v31 as reserved. If the first is no, this code is fine as is.)

[bzEq]

It should refer to vec-extabi, which is the default. See

rust/compiler/rustc_target/src/spec/base/aix.rs

Line 6 in 8f8bee4

abi: "vec-extabi".into(),

.

[taiki-e]

• vreg should be able to accept #[repr(simd)] types as input/output if the unstable altivec target feature is enabled, but core::arch::{powerpc,powerpc64} vector types, #[repr(simd)], and core::simd are all unstable, so the fact that this is currently a clobber-only should not be considered a blocker of clobber_abi implementation or stabilization. So I have not implemented it in this PR.

Opened #131551 (which is based on this PR) to implement this.

(I'm not sticking to whether that PR should be a separate PR or part of this PR, so I can merge that PR into this PR if needed.)

[bzEq]

r13 is thread pointer in PPC64 ELF, ..., "reserved under 64-bit environment" in AIX

In fact, r13 is also thread pointer in AIX-64 pthread environment, can be considered reserved.

[taiki-e]

Updated to check ABI in v20-v31 for AIX, and update def_regs to reflect the fact that r13 is not reserved on 32-bit AIX (see also LLVM's getReservedRegs). (32-bit AIX is currently not supported by rustc, although)