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Add PAUSE instruction to RISC-V core::arch
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luojia65 committed Dec 2, 2021
1 parent 6239a24 commit aeae8e3
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9 changes: 9 additions & 0 deletions crates/core_arch/src/riscv/mod.rs
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//! RISC-V intrinsics

/// Generates the `PAUSE` instruction
///
/// The PAUSE instruction is a HINT that indicates the current hart's rate of instruction retirement
/// should be temporarily reduced or paused. The duration of its effect must be bounded and may be zero.
#[inline(always)]
pub fn pause() {
unsafe { asm!(".word 0x0100000F") }
}

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