mshv-{bindings, ioctls}: Add more synthetic MSRs

While we create new partition we enable a few synthetic
features and corresponding MSRS needs to be added
to the MSR index list. This additional MSRs will be saved and
restored.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

mshv-bindings/src/regs.rs

@@ -324,8 +324,28 @@ pub fn msr_to_hv_reg_name(msr: u32) -> Result<::std::os::raw::c_uint, &'static s
         IA32_MSR_TSC_ADJUST => Ok(hv_register_name_HV_X64_REGISTER_TSC_ADJUST),
         IA32_MSR_SPEC_CTRL => Ok(hv_register_name_HV_X64_REGISTER_SPEC_CTRL),
         HV_X64_MSR_GUEST_OS_ID => Ok(hv_register_name_HV_REGISTER_GUEST_OS_ID),
-
+        HV_X64_MSR_SINT0 => Ok(hv_register_name_HV_REGISTER_SINT0),
+        HV_X64_MSR_SINT1 => Ok(hv_register_name_HV_REGISTER_SINT1),
+        HV_X64_MSR_SINT2 => Ok(hv_register_name_HV_REGISTER_SINT2),
+        HV_X64_MSR_SINT3 => Ok(hv_register_name_HV_REGISTER_SINT3),
+        HV_X64_MSR_SINT4 => Ok(hv_register_name_HV_REGISTER_SINT4),
+        HV_X64_MSR_SINT5 => Ok(hv_register_name_HV_REGISTER_SINT5),
+        HV_X64_MSR_SINT6 => Ok(hv_register_name_HV_REGISTER_SINT6),
+        HV_X64_MSR_SINT7 => Ok(hv_register_name_HV_REGISTER_SINT7),
+        HV_X64_MSR_SINT8 => Ok(hv_register_name_HV_REGISTER_SINT8),
+        HV_X64_MSR_SINT9 => Ok(hv_register_name_HV_REGISTER_SINT9),
+        HV_X64_MSR_SINT10 => Ok(hv_register_name_HV_REGISTER_SINT10),
+        HV_X64_MSR_SINT11 => Ok(hv_register_name_HV_REGISTER_SINT11),
+        HV_X64_MSR_SINT12 => Ok(hv_register_name_HV_REGISTER_SINT12),
+        HV_X64_MSR_SINT13 => Ok(hv_register_name_HV_REGISTER_SINT13),
+        HV_X64_MSR_SINT14 => Ok(hv_register_name_HV_REGISTER_SINT14),
+        HV_X64_MSR_SINT15 => Ok(hv_register_name_HV_REGISTER_SINT15),
         IA32_MSR_MISC_ENABLE => Ok(hv_register_name_HV_X64_REGISTER_MSR_IA32_MISC_ENABLE),
+        HV_X64_MSR_SCONTROL => Ok(hv_register_name_HV_REGISTER_SCONTROL),
+        HV_X64_MSR_SIEFP => Ok(hv_register_name_HV_REGISTER_SIFP),
+        HV_X64_MSR_SIMP => Ok(hv_register_name_HV_REGISTER_SIPP),
+        HV_X64_MSR_REFERENCE_TSC => Ok(hv_register_name_HV_REGISTER_REFERENCE_TSC),
+        HV_X64_MSR_EOM => Ok(hv_register_name_HV_REGISTER_EOM),
         _ => Err("Not a supported hv_register_name msr"),
     }
 }

mshv-ioctls/src/ioctls/system.rs

@@ -366,9 +366,30 @@ impl Mshv {
                 MPX support needed for this MSR
                 Currently feature is not enabled
             */
-            //IA32_MSR_SPEC_CTRL,
+            IA32_MSR_SPEC_CTRL,
             //IA32_MSR_TSC_ADJUST, // Current hypervisor version does not allow to get this MSR, need to check later
             HV_X64_MSR_GUEST_OS_ID,
+            HV_X64_MSR_SINT0,
+            HV_X64_MSR_SINT1,
+            HV_X64_MSR_SINT2,
+            HV_X64_MSR_SINT3,
+            HV_X64_MSR_SINT4,
+            HV_X64_MSR_SINT5,
+            HV_X64_MSR_SINT6,
+            HV_X64_MSR_SINT7,
+            HV_X64_MSR_SINT8,
+            HV_X64_MSR_SINT9,
+            HV_X64_MSR_SINT10,
+            HV_X64_MSR_SINT11,
+            HV_X64_MSR_SINT12,
+            HV_X64_MSR_SINT13,
+            HV_X64_MSR_SINT14,
+            HV_X64_MSR_SINT15,
+            HV_X64_MSR_SCONTROL,
+            HV_X64_MSR_SIEFP,
+            HV_X64_MSR_SIMP,
+            HV_X64_MSR_REFERENCE_TSC,
+            HV_X64_MSR_EOM,
         ])
         .unwrap())
     }
@@ -395,11 +416,10 @@ mod tests {
         assert!(vm.is_ok());
     }
     #[test]
-    #[ignore]
     fn test_get_msr_index_list() {
         let hv = Mshv::new().unwrap();
         let msr_list = hv.get_msr_index_list().unwrap();
-        assert!(msr_list.as_fam_struct_ref().nmsrs == 45);
+        assert!(msr_list.as_fam_struct_ref().nmsrs == 65);
 
         let mut found = false;
         for index in msr_list.as_slice() {