removed XilinxCell references from old bsc

sangwoojun · Feb 3, 2021 · 4709a47 · 4709a47
1 parent 4bf2d44
commit 4709a47
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/dram/src/DDR3Common.bsv b/dram/src/DDR3Common.bsv
@@ -23,7 +23,7 @@ import Memory            ::*;
 import GetPut            ::*;
 import ClientServer      ::*;
 import BUtils            ::*;
-import I2C               ::*;
+//import I2C               ::*;
 import Connectable       ::*;
 
 //import Cntrs::*;

diff --git a/dram/src/DDR3Controller.bsv b/dram/src/DDR3Controller.bsv
@@ -25,7 +25,7 @@ import Memory            ::*;
 import ClientServer      ::*;
 import GetPut            ::*;
 import BUtils            ::*;
-import I2C               ::*;
+//import I2C               ::*;
 import StmtFSM           ::*;
 import DDR3Common        ::*;
 

diff --git a/examples/streaming/Top.bsv b/examples/streaming/Top.bsv
@@ -4,7 +4,7 @@
 import Clocks :: *;
 import DefaultValue :: *;
 //import Xilinx :: *;
-import XilinxCells :: *;
+//import XilinxCells :: *;
 
 import PcieImport :: *;
 import PcieCtrl :: *;