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dirty dram perf test, added burstIOmerge
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@sangwoojun
sangwoojun committed Sep 11, 2019
1 parent c90130d commit 71ace7c
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Showing 3 changed files with 185 additions and 18 deletions.
48 changes: 41 additions & 7 deletions examples/dramtest/HwMain.bsv
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Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,41 @@ module mkHwMain#(PcieUserIfc pcie, DRAMUserIfc dram)

//DMASplitterIfc#(4) dma <- mkDMASplitter(pcie);

Reg#(Bit#(32)) cycles <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
rule incCycle;
cycles <= cycles + 1;
endrule

FIFO#(Tuple2#(Bit#(16),Bit#(16))) dramReadReqQ <- mkSizedBRAMFIFO(1024, clocked_by pcieclk, reset_by pcierst); // offset, words
Reg#(Bit#(16)) dramReadReqCnt <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(16)) dramReadReqDone <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(16)) dramReqWordLeft <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(16)) dramReqWordOff <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(32)) startCycle <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(32)) elapsedCycle <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
rule startDRAMRead(dramReadReqCnt >= 1024 && dramReqWordLeft == 0);
let r = dramReadReqQ.first;
dramReadReqQ.deq;
dramReqWordLeft <= tpl_2(r);
dramReqWordOff <= tpl_1(r);
dramReadReqDone <= dramReadReqDone + 1;
if ( dramReadReqDone == 0 ) startCycle <= cycles;
endrule
FIFO#(Bool) isLastQ <- mkSizedFIFO(64, clocked_by pcieclk, reset_by pcierst);
rule issueDRAMRead (dramReqWordLeft > 0 );
dramReqWordLeft <= dramReqWordLeft -1;
dramReqWordOff <= dramReqWordOff + 1;
dram.readReq(zeroExtend(dramReqWordOff)*64, 64);
if ( dramReqWordLeft == 1 && dramReadReqDone == dramReadReqCnt ) isLastQ.enq(True);
else isLastQ.enq(False);
endrule
rule procDRAMRead;
let d <- dram.read;
isLastQ.deq;
if ( isLastQ.first ) elapsedCycle <= cycles-startCycle;
endrule


Reg#(Bit#(32)) wordReadLeft <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(32)) wordWriteLeft <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(32)) wordWriteReq <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Expand All @@ -31,10 +66,6 @@ module mkHwMain#(PcieUserIfc pcie, DRAMUserIfc dram)
Reg#(Bit#(32)) dramWriteStartCycle <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
Reg#(Bit#(32)) dramWriteEndCycle <- mkReg(0, clocked_by pcieclk, reset_by pcierst);

Reg#(Bit#(32)) cycles <- mkReg(0, clocked_by pcieclk, reset_by pcierst);
rule incCycle;
cycles <= cycles + 1;
endrule


rule getCmd ( wordWriteLeft == 0 );
Expand All @@ -53,7 +84,8 @@ module mkHwMain#(PcieUserIfc pcie, DRAMUserIfc dram)
dramWriteLeft <= d;
dramWriteStartCycle <= cycles;
end else if ( off == 3 ) begin
dramReadLeft <= d;
dramReadReqQ.enq(tuple2(truncate(d>>16), truncate(d)));
dramReadReqCnt <= dramReadReqCnt + 1;
end
endrule

Expand Down Expand Up @@ -113,9 +145,11 @@ module mkHwMain#(PcieUserIfc pcie, DRAMUserIfc dram)
//pcie.dataSend(r, wordReadLeft);
pcie.dataSend(r, dramWriteEndCycle-dramWriteStartCycle);
end else begin
let noff = (offset-3)*32;
//let noff = (offset-3)*32;
//pcie.dataSend(r, pcie.debug_data);
pcie.dataSend(r, truncate(dramReadVal>>noff));
//pcie.dataSend(r, truncate(dramReadVal>>noff));
pcie.dataSend(r, elapsedCycle);

end
endrule

Expand Down
24 changes: 24 additions & 0 deletions examples/dramtest/cpp/main.cpp
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Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
#include <stdio.h>
#include <unistd.h>
#include <stdint.h>
#include <time.h>

#include "bdbmpcie.h"
//#include "dmasplitter.h"
Expand All @@ -21,6 +23,28 @@ int main(int argc, char** argv) {
size = atoi(argv[1]);
}
*/

srand(time(NULL));
printf( "Sending block read req\n" );
for ( int i = 0; i < 1024; i++ ) {
int roff = rand()&0xffff;
uint32_t data = (roff<<16) | (2048/64);
pcie->userWriteWord(12, data);
printf( "%x data\n", data );
}
sleep(2);
uint32_t cycles = pcie->userReadWord(32);
while ( cycles == 0 ) {
cycles = pcie->userReadWord(32);
printf( "cycles: %d\n", cycles );
sleep(1);
}
printf( "cycles: %d\n", cycles );


exit(0);


unsigned int d = pcie->readWord(0);
printf( "Magic: %x\n", d );
fflush(stdout);
Expand Down
131 changes: 120 additions & 11 deletions src/MergeN.bsv
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Original file line number Diff line number Diff line change
Expand Up @@ -333,20 +333,129 @@ module mkBurstMergeN(BurstMergeNIfc#(n,t,bSz))
endinterface;
end

/*
Vector#(n,BurstMergeEnqIfc#(t, bSz)) enq_;
for ( Integer i = 0; i < valueOf(n); i=i+1 ) begin
enq_[i] = interface BurstMergeEnqIfc;
interface enq = enq_;
method Action deq;
outQ.deq;
endmethod
method t first;
return outQ.first;
endmethod
method ActionValue#(Bit#(bSz)) getBurst;
burstQ.deq;
return burstQ.first;
endmethod
endmodule

interface BurstIOMergeEnqIfc#(type t, numeric type aSz, numeric type bSz);
method Action enq(t d);
method Action burst(Bit#(aSz) a, Bit#(bSz) b);
endinterface

// number, type, burst size, address size
interface BurstIOMergeNIfc#(numeric type n, type t, numeric type aSz, numeric type bSz);
interface Vector#(n, BurstIOMergeEnqIfc#(t, aSz, bSz)) enq;

method ActionValue#(Tuple2#(Bit#(aSz), Bit#(bSz))) getBurst;
method Action deq;
method t first;
endinterface


module mkBurstIOMergeN(BurstIOMergeNIfc#(n,t,aSz,bSz))
provisos(Bits#(t, tSz));
FIFO#(t) outQ <- mkFIFO;
FIFO#(Tuple2#(Bit#(aSz), Bit#(bSz))) burstQ <- mkFIFO;
Vector#(n,BurstIOMergeEnqIfc#(t,aSz,bSz)) enq_;

if ( valueOf(n) > 2 ) begin
Vector#(2, BurstIOMergeNIfc#(TDiv#(n,2),t,aSz,bSz)) ma <- replicateM(mkBurstIOMergeN);
BurstIOMergeNIfc#(2,t,aSz,bSz) m0 <- mkBurstIOMergeN;

rule relayBurst;
let b <- m0.getBurst;
burstQ.enq(tuple2(tpl_1(b), tpl_2(b)));
endrule
rule relayData;
m0.deq;
outQ.enq(m0.first);
endrule

for ( Integer i = 0; i < 2; i=i+1 ) begin
rule relayData_s;
ma[i].deq;
m0.enq[i].enq(ma[i].first);
endrule
rule relayBurst_s;
let b <- ma[i].getBurst;
m0.enq[i].burst(tpl_1(b),tpl_2(b));
endrule
end

for ( Integer i = 0; i < valueOf(n); i=i+1 ) begin
enq_[i] = interface BurstIOMergeEnqIfc;
method Action enq(t d);
if ( i < valueOf(n)/2 ) begin
ma[0].enq[i%(valueOf(n)/2)].enq(d);
end else begin
ma[1].enq[i-(valueOf(n)/2)].enq(d);
end
endmethod
method Action burst(Bit#(aSz) a, Bit#(bSz) b);
if ( i < valueOf(n)/2 ) begin
ma[0].enq[i%(valueOf(n)/2)].burst(a,b);
end else begin
ma[1].enq[i-(valueOf(n)/2)].burst(a,b);
end
endmethod
endinterface;
end
end else if ( valueOf(2) == 2 ) begin

Merge2Ifc#(Tuple2#(Bit#(1), Tuple2#(Bit#(aSz),Bit#(bSz)))) reqM <- mkMerge2;
Vector#(2,FIFO#(t)) inQ <- replicateM(mkFIFO);

Reg#(Bit#(bSz)) burstLeft <- mkReg(0);
Reg#(Bit#(1)) burstSource <- mkReg(?);
rule relay;
if ( burstLeft == 0 ) begin
reqM.deq;
let r_ = reqM.first;
Tuple2#(Bit#(aSz),Bit#(bSz)) bd = tpl_2(r_);
burstLeft <= tpl_2(bd)-1;
burstSource <= tpl_1(r_);

let inidx = tpl_1(r_);
outQ.enq(inQ[inidx].first);
inQ[inidx].deq;

burstQ.enq(tpl_2(r_));
end else begin
outQ.enq(inQ[burstSource].first);
inQ[burstSource].deq;
burstLeft <= burstLeft - 1;
end
endrule
for ( Integer i = 0; i < 2; i=i+1 ) begin
enq_[i] = interface BurstIOMergeEnqIfc;
method Action enq(t d);
inQ[i].enq(d);
endmethod
method Action burst(Bit#(aSz) a, Bit#(bSz) b);
reqM.enq[i].enq(tuple2(fromInteger(i),tuple2(a,b)));
endmethod
endinterface;
end

end else begin // n == 1
enq_[0] = interface BurstIOMergeEnqIfc;
method Action enq(t d);
dataM.enq[i].enq(d);
outQ.enq(d);
endmethod
method Action burst(Bit#(bSz) b);
reqM.enq[i].enq(tuple2(fromInteger(i), b));
method Action burst(Bit#(aSz) a, Bit#(bSz) b);
burstQ.enq(tuple2(a,b));
endmethod
endinterface;
end
interface enq = enq_;
*/
end

interface enq = enq_;
method Action deq;
Expand All @@ -355,7 +464,7 @@ module mkBurstMergeN(BurstMergeNIfc#(n,t,bSz))
method t first;
return outQ.first;
endmethod
method ActionValue#(Bit#(bSz)) getBurst;
method ActionValue#(Tuple2#(Bit#(aSz), Bit#(bSz))) getBurst;
burstQ.deq;
return burstQ.first;
endmethod
Expand Down

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