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cpuid: replaced macros with constant integers
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Signed-off-by: Vitaly Chipounov <vitaly@cyberhaven.io>
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vitaly-cyberhaven committed May 9, 2019
1 parent 3a48acb commit 686ab16
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Showing 2 changed files with 133 additions and 130 deletions.
208 changes: 104 additions & 104 deletions include/cpu/i386/cpuid.h
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Original file line number Diff line number Diff line change
Expand Up @@ -64,110 +64,110 @@ int cpu_x86_register(cpuid_t *cpuid, const char *cpu_model, int is64);
void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg);

/* cpuid_features bits */
#define CPUID_FP87 (1 << 0)
#define CPUID_VME (1 << 1)
#define CPUID_DE (1 << 2)
#define CPUID_PSE (1 << 3)
#define CPUID_TSC (1 << 4)
#define CPUID_MSR (1 << 5)
#define CPUID_PAE (1 << 6)
#define CPUID_MCE (1 << 7)
#define CPUID_CX8 (1 << 8)
#define CPUID_APIC (1 << 9)
#define CPUID_SEP (1 << 11) /* sysenter/sysexit */
#define CPUID_MTRR (1 << 12)
#define CPUID_PGE (1 << 13)
#define CPUID_MCA (1 << 14)
#define CPUID_CMOV (1 << 15)
#define CPUID_PAT (1 << 16)
#define CPUID_PSE36 (1 << 17)
#define CPUID_PN (1 << 18)
#define CPUID_CLFLUSH (1 << 19)
#define CPUID_DTS (1 << 21)
#define CPUID_ACPI (1 << 22)
#define CPUID_MMX (1 << 23)
#define CPUID_FXSR (1 << 24)
#define CPUID_SSE (1 << 25)
#define CPUID_SSE2 (1 << 26)
#define CPUID_SS (1 << 27)
#define CPUID_HT (1 << 28)
#define CPUID_TM (1 << 29)
#define CPUID_IA64 (1 << 30)
#define CPUID_PBE (1 << 31)

#define CPUID_EXT_SSE3 (1 << 0)
#define CPUID_EXT_DTES64 (1 << 2)
#define CPUID_EXT_MONITOR (1 << 3)
#define CPUID_EXT_DSCPL (1 << 4)
#define CPUID_EXT_VMX (1 << 5)
#define CPUID_EXT_SMX (1 << 6)
#define CPUID_EXT_EST (1 << 7)
#define CPUID_EXT_TM2 (1 << 8)
#define CPUID_EXT_SSSE3 (1 << 9)
#define CPUID_EXT_CID (1 << 10)
#define CPUID_EXT_CX16 (1 << 13)
#define CPUID_EXT_XTPR (1 << 14)
#define CPUID_EXT_PDCM (1 << 15)
#define CPUID_EXT_S2E (1 << 16)
#define CPUID_EXT_DCA (1 << 18)
#define CPUID_EXT_SSE41 (1 << 19)
#define CPUID_EXT_SSE42 (1 << 20)
#define CPUID_EXT_X2APIC (1 << 21)
#define CPUID_EXT_MOVBE (1 << 22)
#define CPUID_EXT_POPCNT (1 << 23)
#define CPUID_EXT_XSAVE (1 << 26)
#define CPUID_EXT_OSXSAVE (1 << 27)
#define CPUID_EXT_HYPERVISOR (1 << 31)

#define CPUID_EXT2_SYSCALL (1 << 11)
#define CPUID_EXT2_MP (1 << 19)
#define CPUID_EXT2_NX (1 << 20)
#define CPUID_EXT2_MMXEXT (1 << 22)
#define CPUID_EXT2_FFXSR (1 << 25)
#define CPUID_EXT2_PDPE1GB (1 << 26)
#define CPUID_EXT2_RDTSCP (1 << 27)
#define CPUID_EXT2_LM (1 << 29)
#define CPUID_EXT2_3DNOWEXT (1 << 30)
#define CPUID_EXT2_3DNOW (1 << 31)

#define CPUID_EXT3_LAHF_LM (1 << 0)
#define CPUID_EXT3_CMP_LEG (1 << 1)
#define CPUID_EXT3_SVM (1 << 2)
#define CPUID_EXT3_EXTAPIC (1 << 3)
#define CPUID_EXT3_CR8LEG (1 << 4)
#define CPUID_EXT3_ABM (1 << 5)
#define CPUID_EXT3_SSE4A (1 << 6)
#define CPUID_EXT3_MISALIGNSSE (1 << 7)
#define CPUID_EXT3_3DNOWPREFETCH (1 << 8)
#define CPUID_EXT3_OSVW (1 << 9)
#define CPUID_EXT3_IBS (1 << 10)
#define CPUID_EXT3_SKINIT (1 << 12)

#define CPUID_SVM_NPT (1 << 0)
#define CPUID_SVM_LBRV (1 << 1)
#define CPUID_SVM_SVMLOCK (1 << 2)
#define CPUID_SVM_NRIPSAVE (1 << 3)
#define CPUID_SVM_TSCSCALE (1 << 4)
#define CPUID_SVM_VMCBCLEAN (1 << 5)
#define CPUID_SVM_FLUSHASID (1 << 6)
#define CPUID_SVM_DECODEASSIST (1 << 7)
#define CPUID_SVM_PAUSEFILTER (1 << 10)
#define CPUID_SVM_PFTHRESHOLD (1 << 12)

#define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */
#define CPUID_VENDOR_INTEL_2 0x49656e69 /* "ineI" */
#define CPUID_VENDOR_INTEL_3 0x6c65746e /* "ntel" */

#define CPUID_VENDOR_AMD_1 0x68747541 /* "Auth" */
#define CPUID_VENDOR_AMD_2 0x69746e65 /* "enti" */
#define CPUID_VENDOR_AMD_3 0x444d4163 /* "cAMD" */

#define CPUID_VENDOR_VIA_1 0x746e6543 /* "Cent" */
#define CPUID_VENDOR_VIA_2 0x48727561 /* "aurH" */
#define CPUID_VENDOR_VIA_3 0x736c7561 /* "auls" */

#define CPUID_MWAIT_IBE (1 << 1) /* Interrupts can exit capability */
#define CPUID_MWAIT_EMX (1 << 0) /* enumeration supported */
static const uint32_t CPUID_FP87 = (1 << 0);
static const uint32_t CPUID_VME = (1 << 1);
static const uint32_t CPUID_DE = (1 << 2);
static const uint32_t CPUID_PSE = (1 << 3);
static const uint32_t CPUID_TSC = (1 << 4);
static const uint32_t CPUID_MSR = (1 << 5);
static const uint32_t CPUID_PAE = (1 << 6);
static const uint32_t CPUID_MCE = (1 << 7);
static const uint32_t CPUID_CX8 = (1 << 8);
static const uint32_t CPUID_APIC = (1 << 9);
static const uint32_t CPUID_SEP = (1 << 11); /* sysenter/sysexit */
static const uint32_t CPUID_MTRR = (1 << 12);
static const uint32_t CPUID_PGE = (1 << 13);
static const uint32_t CPUID_MCA = (1 << 14);
static const uint32_t CPUID_CMOV = (1 << 15);
static const uint32_t CPUID_PAT = (1 << 16);
static const uint32_t CPUID_PSE36 = (1 << 17);
static const uint32_t CPUID_PN = (1 << 18);
static const uint32_t CPUID_CLFLUSH = (1 << 19);
static const uint32_t CPUID_DTS = (1 << 21);
static const uint32_t CPUID_ACPI = (1 << 22);
static const uint32_t CPUID_MMX = (1 << 23);
static const uint32_t CPUID_FXSR = (1 << 24);
static const uint32_t CPUID_SSE = (1 << 25);
static const uint32_t CPUID_SSE2 = (1 << 26);
static const uint32_t CPUID_SS = (1 << 27);
static const uint32_t CPUID_HT = (1 << 28);
static const uint32_t CPUID_TM = (1 << 29);
static const uint32_t CPUID_IA64 = (1 << 30);
static const uint32_t CPUID_PBE = (1 << 31);

static const uint32_t CPUID_EXT_SSE3 = (1 << 0);
static const uint32_t CPUID_EXT_DTES64 = (1 << 2);
static const uint32_t CPUID_EXT_MONITOR = (1 << 3);
static const uint32_t CPUID_EXT_DSCPL = (1 << 4);
static const uint32_t CPUID_EXT_VMX = (1 << 5);
static const uint32_t CPUID_EXT_SMX = (1 << 6);
static const uint32_t CPUID_EXT_EST = (1 << 7);
static const uint32_t CPUID_EXT_TM2 = (1 << 8);
static const uint32_t CPUID_EXT_SSSE3 = (1 << 9);
static const uint32_t CPUID_EXT_CID = (1 << 10);
static const uint32_t CPUID_EXT_CX16 = (1 << 13);
static const uint32_t CPUID_EXT_XTPR = (1 << 14);
static const uint32_t CPUID_EXT_PDCM = (1 << 15);
static const uint32_t CPUID_EXT_S2E = (1 << 16);
static const uint32_t CPUID_EXT_DCA = (1 << 18);
static const uint32_t CPUID_EXT_SSE41 = (1 << 19);
static const uint32_t CPUID_EXT_SSE42 = (1 << 20);
static const uint32_t CPUID_EXT_X2APIC = (1 << 21);
static const uint32_t CPUID_EXT_MOVBE = (1 << 22);
static const uint32_t CPUID_EXT_POPCNT = (1 << 23);
static const uint32_t CPUID_EXT_XSAVE = (1 << 26);
static const uint32_t CPUID_EXT_OSXSAVE = (1 << 27);
static const uint32_t CPUID_EXT_HYPERVISOR = (1 << 31);

static const uint32_t CPUID_EXT2_SYSCALL = (1 << 11);
static const uint32_t CPUID_EXT2_MP = (1 << 19);
static const uint32_t CPUID_EXT2_NX = (1 << 20);
static const uint32_t CPUID_EXT2_MMXEXT = (1 << 22);
static const uint32_t CPUID_EXT2_FFXSR = (1 << 25);
static const uint32_t CPUID_EXT2_PDPE1GB = (1 << 26);
static const uint32_t CPUID_EXT2_RDTSCP = (1 << 27);
static const uint32_t CPUID_EXT2_LM = (1 << 29);
static const uint32_t CPUID_EXT2_3DNOWEXT = (1 << 30);
static const uint32_t CPUID_EXT2_3DNOW = (1 << 31);

static const uint32_t CPUID_EXT3_LAHF_LM = (1 << 0);
static const uint32_t CPUID_EXT3_CMP_LEG = (1 << 1);
static const uint32_t CPUID_EXT3_SVM = (1 << 2);
static const uint32_t CPUID_EXT3_EXTAPIC = (1 << 3);
static const uint32_t CPUID_EXT3_CR8LEG = (1 << 4);
static const uint32_t CPUID_EXT3_ABM = (1 << 5);
static const uint32_t CPUID_EXT3_SSE4A = (1 << 6);
static const uint32_t CPUID_EXT3_MISALIGNSSE = (1 << 7);
static const uint32_t CPUID_EXT3_3DNOWPREFETCH = (1 << 8);
static const uint32_t CPUID_EXT3_OSVW = (1 << 9);
static const uint32_t CPUID_EXT3_IBS = (1 << 10);
static const uint32_t CPUID_EXT3_SKINIT = (1 << 12);

static const uint32_t CPUID_SVM_NPT = (1 << 0);
static const uint32_t CPUID_SVM_LBRV = (1 << 1);
static const uint32_t CPUID_SVM_SVMLOCK = (1 << 2);
static const uint32_t CPUID_SVM_NRIPSAVE = (1 << 3);
static const uint32_t CPUID_SVM_TSCSCALE = (1 << 4);
static const uint32_t CPUID_SVM_VMCBCLEAN = (1 << 5);
static const uint32_t CPUID_SVM_FLUSHASID = (1 << 6);
static const uint32_t CPUID_SVM_DECODEASSIST = (1 << 7);
static const uint32_t CPUID_SVM_PAUSEFILTER = (1 << 10);
static const uint32_t CPUID_SVM_PFTHRESHOLD = (1 << 12);

static const uint32_t CPUID_VENDOR_INTEL_1 = 0x756e6547; /* "Genu" */
static const uint32_t CPUID_VENDOR_INTEL_2 = 0x49656e69; /* "ineI" */
static const uint32_t CPUID_VENDOR_INTEL_3 = 0x6c65746e; /* "ntel" */

static const uint32_t CPUID_VENDOR_AMD_1 = 0x68747541; /* "Auth" */
static const uint32_t CPUID_VENDOR_AMD_2 = 0x69746e65; /* "enti" */
static const uint32_t CPUID_VENDOR_AMD_3 = 0x444d4163; /* "cAMD" */

static const uint32_t CPUID_VENDOR_VIA_1 = 0x746e6543; /* "Cent" */
static const uint32_t CPUID_VENDOR_VIA_2 = 0x48727561; /* "aurH" */
static const uint32_t CPUID_VENDOR_VIA_3 = 0x736c7561; /* "auls" */

static const uint32_t CPUID_MWAIT_IBE = (1 << 1); /* Interrupts can exit capability */
static const uint32_t CPUID_MWAIT_EMX = (1 << 0); /* enumeration supported */

#ifdef __cplusplus
}
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55 changes: 29 additions & 26 deletions src/target-i386/cpuid.c
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,6 @@
/// You should have received a copy of the GNU Library General Public
/// License along with this library; if not, see <http://www.gnu.org/licenses/>.

#include <bsd/string.h>
#include <glib.h>
#include <inttypes.h>
#include <stdbool.h>
Expand Down Expand Up @@ -205,8 +204,6 @@ typedef struct model_features_t {
uint32_t cpuid;
} model_features_t;

#define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))

/* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
* a substring. ex if !NULL points to the first char after a substring,
* otherwise the string is assumed to sized by a terminating nul.
Expand Down Expand Up @@ -295,39 +292,45 @@ typedef struct x86_def_t {
uint32_t xlevel2;
} x86_def_t;

#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
#define PENTIUM_FEATURES \
(I486_FEATURES | CPUID_DE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
#define PENTIUM2_FEATURES \
(PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
CPUID_PSE36 | CPUID_FXSR)
#define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
#define PPRO_FEATURES \
(CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | CPUID_PAE | CPUID_SEP | CPUID_APIC)
#define EXT2_FEATURE_MASK 0x0183F3FF

#define TCG_FEATURES \
(CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | \
CPUID_SEP | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | CPUID_PSE36 | CPUID_CLFLUSH | \
CPUID_ACPI | CPUID_MMX | CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
static const uint32_t I486_FEATURES = CPUID_FP87 | CPUID_VME | CPUID_PSE;
static const uint32_t PENTIUM_FEATURES =
I486_FEATURES | CPUID_DE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC;

static const uint32_t PENTIUM2_FEATURES = (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | CPUID_MTRR | CPUID_PGE |
CPUID_MCA | CPUID_CMOV | CPUID_PAT | CPUID_PSE36 | CPUID_FXSR);

static const uint32_t PENTIUM3_FEATURES = PENTIUM2_FEATURES | CPUID_SSE;

static const uint32_t PPRO_FEATURES =
(CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV |
CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | CPUID_PAE | CPUID_SEP | CPUID_APIC);

static const uint32_t EXT2_FEATURE_MASK = 0x0183F3FF;

static const uint32_t TCG_FEATURES =
(CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC |
CPUID_SEP | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | CPUID_PSE36 | CPUID_CLFLUSH |
CPUID_ACPI | CPUID_MMX | CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS);

/* partly implemented:
CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
CPUID_PSE36 (needed for Solaris) */
/* missing:
CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
#define TCG_EXT_FEATURES \
(CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 | CPUID_EXT_POPCNT | CPUID_EXT_HYPERVISOR | CPUID_EXT_S2E)
static const uint32_t TCG_EXT_FEATURES =
(CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 | CPUID_EXT_POPCNT | CPUID_EXT_HYPERVISOR | CPUID_EXT_S2E);

/* missing:
CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
#define TCG_EXT2_FEATURES \
((TCG_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | CPUID_EXT2_3DNOW | \
CPUID_EXT2_3DNOWEXT)
static const uint32_t TCG_EXT2_FEATURES = ((TCG_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX | CPUID_EXT2_MMXEXT |
CPUID_EXT2_RDTSCP | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT);

/* missing:
CPUID_EXT2_PDPE1GB */
#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
#define TCG_SVM_FEATURES 0
static const uint32_t TCG_EXT3_FEATURES =
(CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A);
static const uint32_t TCG_SVM_FEATURES = 0;

/* maintains list of cpu model definitions
*/
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