set default alpha [skip ci]

diffsptk/core/b2mc.py

@@ -35,7 +35,7 @@ class MLSADigitalFilterCoefficientsToMelCepstrum(nn.Module):
 
     """
 
-    def __init__(self, cep_order, alpha):
+    def __init__(self, cep_order, alpha=0):
         super(MLSADigitalFilterCoefficientsToMelCepstrum, self).__init__()
 
         assert 0 <= cep_order

diffsptk/core/freqt.py

@@ -38,7 +38,7 @@ class FrequencyTransform(nn.Module):
 
     """
 
-    def __init__(self, in_order, out_order, alpha):
+    def __init__(self, in_order, out_order, alpha=0):
         super(FrequencyTransform, self).__init__()
 
         assert 0 <= in_order

diffsptk/core/freqt2.py

@@ -53,7 +53,7 @@ class SecondOrderAllPassFrequencyTransform(nn.Module):
 
     """
 
-    def __init__(self, in_order, out_order, alpha, theta, n_fft=512):
+    def __init__(self, in_order, out_order, alpha=0, theta=0, n_fft=512):
         super(SecondOrderAllPassFrequencyTransform, self).__init__()
 
         assert 0 <= in_order

diffsptk/core/ifreqt2.py

@@ -44,7 +44,7 @@ class SecondOrderAllPassInverseFrequencyTransform(nn.Module):
 
     """
 
-    def __init__(self, in_order, out_order, alpha, theta, n_fft=512):
+    def __init__(self, in_order, out_order, alpha=0, theta=0, n_fft=512):
         super(SecondOrderAllPassInverseFrequencyTransform, self).__init__()
 
         assert 0 <= in_order

diffsptk/core/mc2b.py

@@ -35,7 +35,7 @@ class MelCepstrumToMLSADigitalFilterCoefficients(nn.Module):
 
     """
 
-    def __init__(self, cep_order, alpha):
+    def __init__(self, cep_order, alpha=0):
         super(MelCepstrumToMLSADigitalFilterCoefficients, self).__init__()
 
         assert 0 <= cep_order