Skip to content
View tangxifan's full-sized avatar

Highlights

  • Pro
Block or Report

Block or report tangxifan

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned

  1. verilog-to-routing/vtr-verilog-to-routing verilog-to-routing/vtr-verilog-to-routing Public

    Verilog to Routing -- Open Source CAD Flow for FPGA Research

    C++ 966 375

  2. lnis-uofu/OpenFPGA lnis-uofu/OpenFPGA Public

    An Open-source FPGA IP Generator

    Verilog 754 150

  3. lnis-uofu/SOFA lnis-uofu/SOFA Public

    SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA

    Verilog 127 26

  4. lnis-uofu/LSOracle lnis-uofu/LSOracle Public

    IDEA project source files

    Verilog 87 41

  5. rabbit-fudan rabbit-fudan Public

    Automatically exported from code.google.com/p/rabbit-fudan

    C

  6. tangxifan-eda-tools tangxifan-eda-tools Public

    C 8 4