Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Add Seal5 backends to generate instrinsics/builtin patches #66

Open
Tracked by #3
PhilippvK opened this issue Apr 26, 2024 · 0 comments
Open
Tracked by #3

Add Seal5 backends to generate instrinsics/builtin patches #66

PhilippvK opened this issue Apr 26, 2024 · 0 comments
Assignees
@thomasgoodfellow
Labels
layer:builtins priority:high seal5:backend type:support
Milestone
Intrinsics/Builti...

Comments

@PhilippvK
Copy link
Contributor

No description provided.

@PhilippvK PhilippvK mentioned this issue Apr 26, 2024
Open
6 tasks
@PhilippvK PhilippvK added this to the Intrinsics/Builtins support milestone Apr 26, 2024
thomasgoodfellow added a commit that referenced this issue Sep 4, 2024
@thomasgoodfellow
Basic support for generating intrinsic functions
73c2a2d 
Partially satisfies issue #66. Caveats abound:
1. only tested with the example subincacc instruction
2. generated code has yet to be tested in execution (e.g. ETISS)
3. intrinsics described through separate YML file; would be better
expressed in CoreDSL alongside the instruction

That the intrinsic support is partially implemented through the
riscv_instr_info is ungainly but made the dependency between the
instruction definition and the intrinsic trivial. The improved intrinsic
support in LLVM19 onwards may help to keep the implementation in the
riscv_intrinsics module.
thomasgoodfellow added a commit that referenced this issue Sep 10, 2024
@thomasgoodfellow
Basic support for generating intrinsic functions
f173ead 
Partially satisfies issue #66. Caveats abound:
1. only tested with the example subincacc instruction
2. generated code has yet to be tested in execution (e.g. ETISS)
3. intrinsics described through separate YML file; would be better
expressed in CoreDSL alongside the instruction

That the intrinsic support is partially implemented through the
riscv_instr_info is ungainly but made the dependency between the
instruction definition and the intrinsic trivial. The improved intrinsic
support in LLVM19 onwards may help to keep the implementation in the
riscv_intrinsics module.
thomasgoodfellow added a commit that referenced this issue Sep 13, 2024
@thomasgoodfellow
Basic support for generating intrinsic functions
64eb705 
Partially satisfies issue #66. Caveats abound:
1. only tested with the example subincacc instruction
2. generated code has yet to be tested in execution (e.g. ETISS)
3. intrinsics described through separate YML file; would be better
expressed in CoreDSL alongside the instruction

That the intrinsic support is partially implemented through the
riscv_instr_info is ungainly but made the dependency between the
instruction definition and the intrinsic trivial. The improved intrinsic
support in LLVM19 onwards may help to keep the implementation in the
riscv_intrinsics module.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees

@thomasgoodfellow thomasgoodfellow

Labels
layer:builtins priority:high seal5:backend type:support
Projects
None yet
Milestone
Intrinsics/Builtins support
Development

No branches or pull requests
2 participants
@thomasgoodfellow @PhilippvK