Readme updates

zhihanxu · Jun 24, 2019 · fa948cc · fa948cc
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diff --git a/getting_started/host/host_global_bandwidth_5.0_shell/README.md b/getting_started/host/host_global_bandwidth_5.0_shell/README.md
@@ -6,7 +6,7 @@ Host to global memory bandwidth test for 5.0 shell
 ## SUPPORTED PLATFORMS
 Platform | Board             | Software Version
 ---------|-------------------|-----------------
-xilinx_aws-vu9p-f1-04261818|Xilinx Only 5.0 Shell|SDx 2019.1
+Xilinx|5.0 Shell only|SDx 2019.1
 
 
 ##  DESIGN FILES

diff --git a/getting_started/kernel_to_gmem/README.md b/getting_started/kernel_to_gmem/README.md
@@ -16,6 +16,7 @@ Example        | Description           | Key Concepts / Keywords
 [gmem_2banks_ocl/][]|This example of 2ddr to demonstrate on how to use 2ddr DSA. How to create buffers in each DDR.|__Key__ __Concepts__<br> - Multiple Banks<br>__Keywords__<br> - max_memory_ports<br> - misc:map_connect
 [gmem_2banks_ocl_5.0_shell/][]|This example of 2ddr to demonstrate on how to use 2ddr DSA. How to create buffers in each DDR.|__Key__ __Concepts__<br> - Multiple Banks<br>__Keywords__<br> - max_memory_ports<br> - misc:map_connect
 [kernel_global_bandwidth/][]|Bandwidth test of global to local memory.|
+[kernel_global_bandwidth_5.0_shell/][]|Bandwidth test of global to local memory.|
 [memcoalesce_hang_c/][]|This example shows Memory Coalesce Deadlock/Hand situation and how to handle it. User can switch between BAD and GOOD case using makefile variable KFLOW.|__Key__ __Concepts__<br> - Memory Coalesce<br> - Memory Deadlock/Hang<br> - Multiple Interfaces<br>__Keywords__<br> - HLS INTERFACE<br> - bundle<br> - m_axi
 [plram_access_c/][]|This example shows the usage of PLRAM and how to use it with simple matrix multiplication (Row x Col).|__Key__ __Concepts__<br> - SDx Memory Hierarchy<br> - PLRAMs<br>__Keywords__<br> - PLRAM
 [row_array_2d_c/][]|This is a simple example of accessing each row of data from 2d array|__Key__ __Concepts__<br> - Row of 2D data array access<br>__Keywords__<br> - hls::stream
@@ -36,6 +37,7 @@ Example        | Description           | Key Concepts / Keywords
 [gmem_2banks_ocl/]:gmem_2banks_ocl/
 [gmem_2banks_ocl_5.0_shell/]:gmem_2banks_ocl_5.0_shell/
 [kernel_global_bandwidth/]:kernel_global_bandwidth/
+[kernel_global_bandwidth_5.0_shell/]:kernel_global_bandwidth_5.0_shell/
 [memcoalesce_hang_c/]:memcoalesce_hang_c/
 [plram_access_c/]:plram_access_c/
 [row_array_2d_c/]:row_array_2d_c/

diff --git a/getting_started/kernel_to_gmem/gmem_2banks_c_5.0_shell/README.md b/getting_started/kernel_to_gmem/gmem_2banks_c_5.0_shell/README.md
@@ -10,7 +10,7 @@ This example of 2ddr to demonstrate on how to use 2ddr DSA. How to create buffer
 ## SUPPORTED PLATFORMS
 Platform | Board             | Software Version
 ---------|-------------------|-----------------
-xilinx_aws-vu9p-f1-04261818|Xilinx Only 5.0 Shell|SDx 2019.1
+Xilinx|5.0 Shell only|SDx 2019.1
 
 
 ##  DESIGN FILES

diff --git a/getting_started/kernel_to_gmem/gmem_2banks_ocl_5.0_shell/README.md b/getting_started/kernel_to_gmem/gmem_2banks_ocl_5.0_shell/README.md
@@ -10,7 +10,7 @@ This example of 2ddr to demonstrate on how to use 2ddr DSA. How to create buffer
 ## SUPPORTED PLATFORMS
 Platform | Board             | Software Version
 ---------|-------------------|-----------------
-xilinx_aws-vu9p-f1-04261818|Xilinx Only 5.0 Shell|SDx 2019.1
+Xilinx|5.0 Shell only|SDx 2019.1
 
 
 ##  DESIGN FILES

diff --git a/getting_started/kernel_to_gmem/kernel_global_bandwidth_5.0_shell/README.md b/getting_started/kernel_to_gmem/kernel_global_bandwidth_5.0_shell/README.md
@@ -1,12 +1,12 @@
-kernel_global
+kernel_global for 5.0 shell
 ======================
 
 Bandwidth test of global to local memory.
 
 ## SUPPORTED PLATFORMS
 Platform | Board             | Software Version
 ---------|-------------------|-----------------
-xilinx_aws-vu9p-f1-04261818|Xilinx Only 5.0 Shell|SDx 2019.1
+Xilinx|5.0 Shell only|SDx 2019.1
 
 
 ##  DESIGN FILES

diff --git a/getting_started/kernel_to_gmem/kernel_global_bandwidth_5.0_shell/description.json b/getting_started/kernel_to_gmem/kernel_global_bandwidth_5.0_shell/description.json
@@ -1,6 +1,6 @@
 {
     "runtime": ["OpenCL"],
-    "example" : "kernel_global",
+    "example" : "kernel_global for 5.0 shell",
     "overview" : [
         "Bandwidth test of global to local memory."
     ],

diff --git a/utility/readme_gen/readme_gen.py b/utility/readme_gen/readme_gen.py
@@ -7,11 +7,14 @@
 
 DSA = 'xilinx_u200_qdma'
 VERSION = 'SDx 2019.1'
-DEVICES = {
+AWS_DEVICES = {
     'xilinx_aws-vu9p-f1-04261818': {
        'version': '5.0',
-       'name': 'Xilinx Only 5.0 Shell',
-    },	
+       'name': '5.0 Shell only',
+    }	
+}
+
+DEVICES = {
     'xilinx_u200_qdma': {
        'version': '201910_1',
        'name': 'Xilinx Alveo U200',
@@ -95,25 +98,35 @@ def requirements(target,data):
     target.write("---------|-------------------|-----------------\n")
 
     boards = []
-    if 'board' in data:
-        board = data['board']
-        boards = [word for word in DEVICES if word in board]
-    else:
-        nboard = []
-        if 'nboard' in data:
-            nboard = data['nboard']
-        boards = [word for word in DEVICES if word not in nboard]
+    if 'shell' in data['example']:
+	boards = [word for word in AWS_DEVICES]
+    else:			
+        if 'board' in data:
+            board = data['board']
+            boards = [word for word in DEVICES if word in board]
+        else:
+            nboard = []
+            if 'nboard' in data:
+                nboard = data['nboard']
+            boards = [word for word in DEVICES if word not in nboard]
 
     for board in boards:
-        target.write(board)
+	if 'shell' in data['example']:
+		target.write("Xilinx")
+	else:
+        	target.write(board)
         target.write("|")
-        target.write(DEVICES[board]['name'])
+	if 'shell' in data['example']:
+	    target.write(AWS_DEVICES[board]['name'])
+	else:	
+            target.write(DEVICES[board]['name'])
         target.write("|")
         target.write(VERSION)
         target.write("\n")
-    target.write("\n\n") 
+    target.write("\n\n")
     return
 
+
 def hierarchy(target):
     target.write("##  DESIGN FILES\n")
     target.write("Application code is located in the src directory. ")
@@ -131,6 +144,15 @@ def hierarchy(target):
 
 def commandargs(target,data):
     target.write("##  COMMAND LINE ARGUMENTS\n")
+    if 'libs' in data:
+	if 'opencv' in data['libs']:
+		target.write("***OpenCV for Example Applications***")
+		target.write("\n\n")
+		target.write("This application requires OpenCV runtime libraries. If the host does not have OpenCV installed use the Xilinx included libraries with the following command:")
+		target.write("\n\n")
+		target.write("`export LD_LIBRARY_PATH=$XILINX_SDX/lnx64/tools/opencv/:$LD_LIBRARY_PATH`")
+		target.write("\n\n") 
+
     target.write("Once the environment has been configured, the application can be executed by\n")
     target.write("```\n")
     if not "cmd_args" in data:

diff --git a/vision/convolve/README.md b/vision/convolve/README.md
@@ -31,6 +31,12 @@ src/krnl_convolve.cl
 ```
 
 ##  COMMAND LINE ARGUMENTS
+***OpenCV for Example Applications***
+
+This application requires OpenCV runtime libraries. If the host does not have OpenCV installed use the Xilinx included libraries with the following command:
+
+`export LD_LIBRARY_PATH=$XILINX_SDX/lnx64/tools/opencv/:$LD_LIBRARY_PATH`
+
 Once the environment has been configured, the application can be executed by
 ```
 ./convolve <krnl_convolve XCLBIN> ./data/input_buffer_raw.txt ./data/filter_buffer_raw.txt ./data/output_buffer_raw.txt

diff --git a/vision/edge_detection/README.md b/vision/edge_detection/README.md
@@ -29,6 +29,12 @@ src/krnl_sobelfilter.cl
 ```
 
 ##  COMMAND LINE ARGUMENTS
+***OpenCV for Example Applications***
+
+This application requires OpenCV runtime libraries. If the host does not have OpenCV installed use the Xilinx included libraries with the following command:
+
+`export LD_LIBRARY_PATH=$XILINX_SDX/lnx64/tools/opencv/:$LD_LIBRARY_PATH`
+
 Once the environment has been configured, the application can be executed by
 ```
 ./edge <krnl_edge XCLBIN> ./data/input/eiffel.bmp

diff --git a/vision/histogram_eq/README.md b/vision/histogram_eq/README.md
@@ -29,6 +29,12 @@ src/krnl_equalizer.cl
 ```
 
 ##  COMMAND LINE ARGUMENTS
+***OpenCV for Example Applications***
+
+This application requires OpenCV runtime libraries. If the host does not have OpenCV installed use the Xilinx included libraries with the following command:
+
+`export LD_LIBRARY_PATH=$XILINX_SDX/lnx64/tools/opencv/:$LD_LIBRARY_PATH`
+
 Once the environment has been configured, the application can be executed by
 ```
 ./equalizer <krnl_equalizer XCLBIN> ./data/race_2k.bmp

diff --git a/vision/idct_5.0_shell/README.md b/vision/idct_5.0_shell/README.md
@@ -6,7 +6,7 @@ Example shows an optimized Inverse Discrete Cosine Transfom. Optimizations are a
 ## SUPPORTED PLATFORMS
 Platform | Board             | Software Version
 ---------|-------------------|-----------------
-xilinx_aws-vu9p-f1-04261818|Xilinx Only 5.0 Shell|SDx 2019.1
+Xilinx|5.0 Shell only|SDx 2019.1
 
 
 ##  DESIGN FILES

diff --git a/vision/watermarking_5.0_shell/README.md b/vision/watermarking_5.0_shell/README.md
@@ -11,7 +11,7 @@ xilinx:xil-accel-rd-ku115:4ddr-xpr|1024 x 768|3526
 ## SUPPORTED PLATFORMS
 Platform | Board             | Software Version
 ---------|-------------------|-----------------
-xilinx_aws-vu9p-f1-04261818|Xilinx Only 5.0 Shell|SDx 2019.1
+Xilinx|5.0 Shell only|SDx 2019.1
 
 
 ##  DESIGN FILES