Skip to content

Issues: SpinalHDL/NaxRiscv

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort

Issues list

Compiling multiple branch at once?
#48 by SoCScholar was closed Oct 31, 2023
Debugging -elf file ?
#47 by SoCScholar was closed Oct 31, 2023
Different result in same config
#38 by zyn810039594 was closed Nov 1, 2023
How to use SocDemo.elf file ?
#60 by SoCScholar was closed Nov 10, 2023
.
#66 by SoCScholar was closed Nov 13, 2023
L2 cache refill
#56 by SoCScholar was closed Oct 31, 2023
Slow SRAM
#59 by zyn810039594 was closed Jan 8, 2024
Loop when change GShare RAM
#73 by zyn810039594 was closed Jan 14, 2024
Hi,can you privide an example?
#82 by duanjiulon was closed Apr 25, 2024
Problems about debug and Halt the Nax
#98 by xie-1399 was closed May 16, 2024
Does NaxRicv support S-mode?
#103 by zhangkanqi was closed May 29, 2024
ProTip! Updated in the last three days: updated:>2024-07-12.