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Issues: SpinalHDL/NaxRiscv
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Debugging NaxRiSC V CPU in Verilator terminal and On chip debugger for NaxRiSC V
#45
by SoCScholar
was closed Oct 31, 2023
[Performance bug] Incorrect register dependency tracking
#67
by ronan-lashermes
was closed Nov 14, 2023
Questions about handling CPU read/write requests in NaxRiscV
#28
by skylayer
was closed Dec 27, 2023
LINUX on Litex_NaxRISCV ( Linux-capable, RISC-V-based SoC )
#86
by SoCScholar
was closed Mar 21, 2024
NaxRiscv sets sepc[0]=1 which is against the riscv privileged spec
#101
by zhangkanqi
was closed May 31, 2024
Accessing addr 0x0000001e doesn't throw access fault exception
#108
by zhangkanqi
was closed Jun 1, 2024
[Bug Report] Executing
sfence.vma
under U-mode doesn't throw illegal inst exception
#106
by zhangkanqi
was closed May 30, 2024
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Updated in the last three days: updated:>2024-07-12.