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Issues list

check declared identifiers against set of unwanted patterns good first issue Good for newcomers style-linter Verilog style-linter issues
#370 opened Jul 22, 2020 by fangism
@admud
37
[verible-patch-tool] color the diffs/hunks presented to the user enhancement New feature or request good first issue Good for newcomers
#526 opened Oct 7, 2020 by fangism
24
Build error on Windows build system matters pertaining to building Verible
#1669 opened Feb 1, 2023 by LoveMyPillow
16
Make macro-name-style lint rule parameterizable style-linter Verilog style-linter issues
#378 opened Aug 3, 2020 by msfschaffner
@hzeller
16
[WIP][Discussion] Standalone preprocessor tool design
#1358 opened Jul 3, 2022 by karimtera
13
build fails on windows
#1993 opened Aug 9, 2023 by fpgauserdude
11
Build fails needs the c++20 flag build system matters pertaining to building Verible
#1856 opened Apr 5, 2023 by yurivict
11
[fun] tool/script to animate text formatting/transformation as a demo good first issue Good for newcomers help wanted Extra attention is needed
#528 opened Oct 9, 2020 by fangism
11
[lsp] Spawning language server with cmd: verible-verilog-ls failed with error message: EIO: i/o error
#1320 opened Apr 21, 2022 by eunchan
10
[Mac-os]: create a brew installable binary releases binary release packages
#758 opened Apr 14, 2021 by hzeller
10
Syntax error within SV macros preprocessor anything related to preprocessing (conditionals, macros, etc.)
#102 opened Dec 17, 2019 by msfschaffner
9
[kythe] Extract packed dimensions for unit kythe source code fact extraction and indexing
#518 opened Oct 1, 2020 by MinaToma
@fangism @MinaToma
8
Use case: Removing / expanding preprocessor statements and/or parameters help wanted Extra attention is needed preprocessor anything related to preprocessing (conditionals, macros, etc.)
#365 opened Jul 15, 2020 by WeeBull
8
Use OpenTitan dv_macros.svh as a testcase for macro handling formatter Verilog code formatter issues
#251 opened Apr 1, 2020 by msfschaffner
8
Provide OpenSUSE / SUSE Enterprise Server / RHEL binaries releases binary release packages
#1444 opened Sep 12, 2022 by hzeller
7
[line breaks, wraps] Line break tuning formatter Verilog code formatter issues
#36 opened Nov 26, 2019 by msfschaffner
7
Project tool: crash on some caliptra-rtl files bug Something isn't working language-server Language server related issues project-tool Issues related to the project tool/symbol table
#1946 opened Jun 13, 2023 by hzeller
@glatosinski
6
arm64/centos7 fails to build
#1926 opened May 17, 2023 by hzeller
@AdamOlech
6
Use colored patch output in diff ?
#1874 opened Apr 19, 2023 by hzeller
@IEncinas10
6
LSP fails go-to-definition in Windows environment language-server Language server related issues
#1690 opened Feb 7, 2023 by viktortomov
@glatosinski
6
Is there a way to manually keep line wrap formatter Verilog code formatter issues
#1349 opened Jun 24, 2022 by pinkcatfly
6
verible-verilog-format unable to preprocess macros correctly formatter Verilog code formatter issues preprocessor anything related to preprocessing (conditionals, macros, etc.)
#812 opened May 9, 2021 by tianrui-wei
6
[function-task-explicit-lifetime] parse-as-class-body doesn't analyze using faked context style-linter Verilog style-linter issues
#303 opened May 19, 2020 by pdonahue-ventana
6
Failure to parse if/else macros in always block headers preprocessor anything related to preprocessing (conditionals, macros, etc.)
#228 opened Mar 11, 2020 by imphil
6
Event triggering not recognised as valid syntax bug Something isn't working rejects-valid syntax If the parser wrongly rejects syntactically valid code (according to SV-2017).
#1940 opened Jun 5, 2023 by matlupi
5
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